AT89C51AC3-RDTIM datasheet(50/141 Pages) ATMEL

50 / 141 page

AT89C51AC3

4383A–8051–10/04

Figure 27. Hardware Programming Procedure

Reset the Column Latches

An automatic reset of the column latches is performed after a successful Flash

write sequence. User can also reset the column latches manually, for instance

to reload the column latches before writing the Flash. The following procedure is

summarized below.

•

Save and disable the interrupts.

•

Launch the reset by writing the data sequence 56h followed by A6h in FCON

•

Restore the interrupts.

Error Reports

Flash Programming Sequence

Errors

When a wrong sequence is detected, the SEQERR bit in FSTA register is set. Possible

wrong sequence are :

•

MOV FCON, 5xh instruction not immediately followed by a MOV FCON, Ax

instruction.

•

A write Flash sequence is launched while no data were loaded in the column latches

The SEQERR bit can be cleared

•By software

•

By hardware when a correct programming sequence is completed

When multiple pages are written into the Flash, the user should check FSTA for errors

after each write page sequences, not only at the end of the multiple write pages.

Flash Spaces

Programming

Save and Disable IT

EA = 0

Launch Programming

FCON = 54h

FCON = A4h

End Programming

RestoreIT

FBusy

Cleared?

Clear Mode

FCON = 00h

Data Load

DPTR = 00h

ACC = Data

Exec: MOVX @DPTR, A

FCON = 0Ch

Save and Disable IT

EA = 0

End Loading

Restore IT

AT89C51AC3-RDTIM Datasheet(PDF) 50 Page - ATMEL Corporation

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