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BLUENRG-2 Datasheet(PDF) 99 Page - STMicroelectronics

Part # BLUENRG-2
Description  Bluetooth® low energy wireless system-on-chip
PDF  190 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

BLUENRG-2 Datasheet(HTML) 99 Page - STMicroelectronics

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BlueNRG-2
Functional details
DocID030675 Rev 2
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Bit
Field name
Reset
RW
Description
11
BURST_TX
0x0
RW
Defines the type of DMA request generated by the DMA TX
interface.
0: Single request mode. Transfers a single data (one byte) in
the TX FIFO.
1: Burst request mode. Transfers a programmed burst of data
according to DBSIZE_TX field.
When the burst mode is programmed, the DMA transfer can
be completed by one or more single requests as required.
31:12
RESERVED
0x0
R
RESERVED
Table 108: I2C - BRCR register description: address offset I2CX_BASE_ADDR+0x28
Bit
Field name
Reset
RW
Description
15:0
BRCNT
0x8
RW
Baud rate counter. BRCNT defines the counter value used to
set up the I2C baud rate in standard and fast mode, when the
peripheral is operating in master mode.
31:16
RESERVED
0x0
R
RESERVED
Table 109: I2C - IMSCR register description: address offset I2CX_BASE_ADDR+0x2C
Bit
Field name
Reset
RW
Description
0
TXFEM
0x0
RW
TX FIFO empty mask. TXFEM enables the interrupt bit TXFE:
0: TXFE interrupt is disabled.
1: TXFE interrupt is enabled.
1
TXFNEM
0x0
RW
TX FIFO nearly empty mask. TXFNEM enables the interrupt
bit TXFNE:
0: TXFNE interrupt is disabled.
1: TXFNE interrupt is enabled.
2
TXFFM
0x0
RW
TX FIFO full mask. TXFFM enables the interrupt bit TXFF:
0: TXFF interrupt is disabled.
1: TXFF interrupt is enabled.
3
TXFOVRM
0x0
RW
TX FIFO overrun mask. TXOVRM enables the interrupt bit
TXOVR:
0: TXOVR interrupt is disabled.
1: TXOVR interrupt is enabled.
4
RXFEM
0x0
RW
RX FIFO empty mask. RXFEM enables the interrupt bit RXFE:
0: RXFE interrupt is disabled.
1: RXFE interrupt is enabled.
5
RXFNFM
0x0
RW
RX FIFO nearly full mask. RXNFM enables the interrupt bit
RXNF:
0: RXNF interrupt is disabled.
1: RXNF interrupt is enabled
6
RXFFM
0x0
RW
RX FIFO full mask. RXFFM enables the interrupt bit RXFF:
0: RXFF interrupt is disabled.
1: RXFF interrupt is enabled.
15:7
RESERVED
0x0
R
RESERVED



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