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PIC18F4539-E/MLSQTP Datasheet(PDF) 281 Page - Microchip Technology

Part # PIC18F4539-E/MLSQTP
Description  Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel
PDF  322 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4539-E/MLSQTP Datasheet(HTML) 281 Page - Microchip Technology

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 2002 Microchip Technology Inc.
Preliminary
DS30485A-page 279
PIC18FXX39
FIGURE 23-15:
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
TABLE 23-14: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
Param. No.
Symbol
Characteristic
Min
Max Units Conditions
70
TssL2scH,
TssL2scL
SS
↓ to SCK↓ or SCK↑ input
TCY
—ns
71
TscH
SCK input high time
(Slave mode)
Continuous
1.25 TCY + 30
—
ns
71A
Single Byte
40
—
ns
(Note 1)
72
TscL
SCK input low time
(Slave mode)
Continuous
1.25 TCY + 30
—
ns
72A
Single Byte
40
—
ns
(Note 1)
73A
TB2B
Last clock edge of Byte 1 to the first clock edge of Byte 2 1.5 TCY + 40
—
ns
(Note 2)
74
TscH2diL,
TscL2diL
Hold time of SDI data input to SCK edge
100
—
ns
75
TdoR
SDO data output rise time
PIC18FXXXX
—
25
ns
PIC18LFXXXX
—
60
ns
VDD = 2V
76
TdoF
SDO data output fall time
PIC18FXXXX
—
25
ns
PIC18LFXXXX
—
60
ns
VDD = 2V
77
TssH2doZ SS
↑ to SDO output hi-impedance
10
50
ns
78
TscR
SCK output rise time (Master mode)
PIC18FXXXX
—
25
ns
PIC18LFXXXX
—
60
ns
VDD = 2V
79
TscF
SCK output fall time (Master mode)
PIC18FXXXX
—
25
ns
PIC18LFXXXX
—
60
ns
VDD = 2V
80
TscH2doV,
TscL2doV
SDO data output valid after SCK
edge
PIC18FXXXX
—
50
ns
PIC18LFXXXX
—
150
ns
VDD = 2V
82
TssL2doV SDO data output valid after SS
↓ edge PIC18FXXXX
—
50
ns
PIC18LFXXXX
—
150
ns
VDD = 2V
83
TscH2ssH,
TscL2ssH
SS
↑ after SCK edge
1.5 TCY + 40
—
ns
Note 1: Requires the use of Parameter # 73A.
2: Only if Parameter # 71A and # 72A are used.
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SDO
SDI
70
71
72
82
74
75, 76
MSb
bit6 - - - - - -1
LSb
77
MSb In
bit6 - - - -1
LSb In
80
83
Note:
Refer to Figure 23-4 for load conditions.



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