AL2100

Preliminary Data Sheet

11/11/02

Broa d c om Co rp o r a ti o n

List of Tables

Document

AL2100-DS01-405-R

Table 32: Common Register 5: LED0 Setting1 (Map to TP_Phy, Reg 30, Page 1 a28[15:12] = 0001) Bit

Description ........................................................................................................................................ 28

Table 33: Common Register 6: LED0 Setting2 (Map to TP_Phy, Reg. 31, Page 1 a28 [15:12] = 0001) Bit

Description ........................................................................................................................................ 28

Table 34: Common Register 7: LED1 Setting1 (Map to TP_Phy, Reg. 29, Page 2 a28 [15:12] = 0010) Bit

Description ........................................................................................................................................ 28

Table 35: Common Register 8: LED1 Setting2 (Map to TP_Phy, Reg. 30, Page 2 a28 [15:12] = 0010) Bit

Description ........................................................................................................................................ 29

Table 36: Common Register 9: LED2 Setting1 (Map to TP_Phy, Reg. 31, Page 2 a28 [15:12] = 0010) Bit

Description ........................................................................................................................................ 29

Table 37: Common Register 10: LED2 Setting2 (Map to TP_Phy, Reg. 29, Page 3 a28 [15:12] = 0011) Bit

Description ........................................................................................................................................ 29

Table 38: Common Register 11: LED3 Setting1 (Map to TP_Phy, Reg. 30, Page 3 a28 [15:12] = 0011) Bit

Description ........................................................................................................................................ 30

Table 39: Common Register 12: LED3 Setting2 (Map TP_Phy, Reg. 31, Page 3 a28 [15:12] = 0011) Bit

Description ........................................................................................................................................ 30

Table 40: Common Register 13: LED4 Setting1 (Map to TP_Phy, Reg 29, Page 4 a28 [15:12] = 0100) Bit

Description ........................................................................................................................................ 30

Table 41: Common Register 14: LED4 Setting2 (Map TP_Phy, Reg 30, Page 4 a28[15:12] = 0100) Bit

Description ........................................................................................................................................ 30

Table 42: 4B/5B Code-Group Table ................................................................................................................. 31

Table 43: SMI Read/Write Sequence ............................................................................................................... 32

Table 44: Absolute Maximum Ratings .............................................................................................................. 33

Table 45: Recommended Operating Conditions ...............................................................................................33

Table 46: Electrical Characteristics...................................................................................................................33

Table 47: Clock Timing .....................................................................................................................................35

Table 48: Reset Timing .....................................................................................................................................35

Table 49: Management Interface Timing .......................................................................................................... 36

Table 50: Thermal Characteristics .................................................................................................................... 41

Table 51: Maximum Junction Temperature ......................................................................................................41