ISL6566 datasheet(6/30 Pages) RENESAS

6 / 30 page

ISL6566

FN9178 Rev 4.00

Page 6 of 30

Mar 9, 2006

Absolute Maximum Ratings

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V

Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V

Absolute Boot Voltage, VBOOT . . . . . . . . GND - 0.3V to GND + 36V

Phase Voltage, VPHASE . . . . . . . . GND - 0.3V to 15V (PVCC = 12)

GND - 8V (<400ns, 20µJ) to 24V (<200ns, VBOOT-PHASE = 12V)

Upper Gate Voltage, VUGATE . . . . VPHASE - 0.3V to VBOOT + 0.3V

VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT + 0.3V

Lower Gate Voltage, VLGATE. . . . . . . . GND - 0.3V to PVCC + 0.3V

GND - 5V (<100ns Pulse Width, 2µJ) to PVCC+ 0.3V

Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD

Recommended Operating Conditions

VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V

5%

PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V

5%

Ambient Temperature (ISL6566CR, ISL6566CRZ) . . . . 0°C to 70°C

Ambient Temperature (ISL6566IR, ISL6566IRZ) . . . . .-40°C to 85°C

Thermal Information

Thermal Resistance

JA (°C/W) JC (°C/W)

QFN Package (Notes 1, 2) . . . . . . . . . .

3.5

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C

Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C

CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational section of this specification is not implied.

NOTES:

JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See

Tech Brief TB379.

2. For

JC, the “case temp” location is the center of the exposed metal pad on the package underside.

Electrical Specifications

Recommended Operating Conditions, Unless Otherwise Specified.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

BIAS SUPPLY AND INTERNAL OSCILLATOR

Input Bias Supply Current

IVCC; ENLL = high

Gate Drive Bias Current

IPVCC; ENLL = high

0.8

VCC POR (Power-On Reset) Threshold

VCC Rising

4.25

4.38

4.50

VCC Falling

3.75

3.88

4.00

PVCC POR (Power-On Reset) Threshold

PVCC Rising

4.25

4.38

4.50

PVCC Falling

3.60

3.88

4.00

Oscillator Ramp Amplitude (Note 3)

VPP

-1.50

Maximum Duty Cycle (Note 3)

66.6

Oscillator Frequency, FSW

RT = 100k (1%)

225

250

275

kHz

CONTROL THRESHOLDS

ENLL Rising Threshold

-0.66

ENLL Hysteresis

100

COMP Shutdown Threshold

COMP Falling

0.2

0.3

0.4

REFERENCE AND DAC

System Accuracy (VID = 1.0V - 1.850V)

-0.5

0.5

System Accuracy (VID = 0.8V - 1.0V)

-0.8

0.8

DAC Input Low Voltage (VR9, VR10)

0.4

DAC Input High Voltage (VR9, VR10)

0.8

DAC Input Low Voltage (AMD)

0.6

DAC Input High Voltage (AMD)

1.0

OFS Sink Current Accuracy (Negative Offset)

ROFS = 30kfrom OFS to VCC

47.5

50.0

52.5

A

OFS Source Current Accuracy (Positive Offset)

ROFS = 10kfrom OFS to GND

47.5

50.0

52.5

A

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