ISL6566 datasheet(20/30 Pages) RENESAS

20 / 30 page

ISL6566

FN9178 Rev 4.00

Page 20 of 30

Mar 9, 2006

If VSEN or RGND become opened, VDIFF falls, causing the

duty cycle to increase and the output voltage on IREF to

increase. If the voltage on IREF exceeds “VDIFF+1V”, the

controller will shut down. Once the voltage on IREF falls

below “VDIFF+1V”, the ISL6566 will restart at the beginning

of soft-start.

Overcurrent Protection

The ISL6566 detects overcurrent events by comparing the

droop voltage, VDROOP, to the OCSET voltage, VOCSET, as

shown in Figure 13. The droop voltage, set by the external

current sensing circuitry, is proportional to the output current

as shown in Equation 7. A constant 100

A flows through

ROCSET, creating the OCSET voltage. When the droop

voltage exceeds the OCSET voltage, the overcurrent

protection circuitry activates. Since the droop voltage is

proportional to the output current, the overcurrent trip level,

IMAX, can be set by selecting the proper value for ROCSET,

as shown in Equation 14.

Once the output current exceeds the overcurrent trip level,

VDROOP will exceed VOCSET, and a comparator will trigger the

converter to begin overcurrent protection procedures. At the

beginning of overcurrent shutdown, the controller turns off both

upper and lower MOSFETs. The system remains in this state

for a period of 4096 switching cycles. If the controller is still

enabled at the end of this wait period, it will attempt a soft-start

(as shown in Figure 14). If the fault remains, the trip-retry cycles

will continue indefinitely until either the controller is disabled or

the fault is cleared. Note that the energy delivered during trip-

retry cycling is much less than during full-load operation, so

there is no thermal hazard.

General Design Guide

This design guide is intended to provide a high-level

explanation of the steps necessary to create a multi-phase

power converter. It is assumed that the reader is familiar with

many of the basic skills and techniques referenced below. In

addition to this guide, Intersil provides complete reference

designs that include schematics, bills of materials, and example

board layouts for all common microprocessor applications.

Power Stages

The first step in designing a multi-phase converter is to

determine the number of phases. This determination

depends heavily on the cost analysis which in turn depends

on system constraints that differ from one design to the next.

Principally, the designer will be concerned with whether

components can be mounted on both sides of the circuit

board, whether through-hole components are permitted, the

total board space available for power-supply circuitry, and

the maximum amount of load current. Generally speaking,

the most economical solutions are those in which each

phase handles between 25 and 30A. All surface-mount

designs will tend toward the lower end of this current range.

If through-hole MOSFETs and inductors can be used, higher

per-phase currents are possible. In cases where board

space is the limiting constraint, current can be pushed as

high as 40A per phase, but these designs require heat sinks

and forced air to cool the MOSFETs, inductors and heat-

dissipating surfaces.

MOSFETS

The choice of MOSFETs depends on the current each

MOSFET will be required to conduct, the switching frequency,

the capability of the MOSFETs to dissipate heat, and the

availability and nature of heat sinking and air flow.

LOWER MOSFET POWER CALCULATION

The calculation for power loss in the lower MOSFET is

simple, since virtually all of the loss in the lower MOSFET is

due to current conducted through the channel resistance

(rDS(ON)). In Equation 15, IM is the maximum continuous

output current, IPP is the peak-to-peak inductor current (see

Equation 1), and d is the duty cycle (VOUT/VIN).

An additional term can be added to the lower-MOSFET loss

equation to account for additional loss accrued during the

dead time when inductor current is flowing through the

lower-MOSFET body diode. This term is dependent on the

diode forward voltage at IM, VD(ON), the switching

frequency, fS, and the length of dead times, td1 and td2, at

the beginning and the end of the lower-MOSFET conduction

interval respectively.

The total maximum power dissipated in each lower MOSFET

is approximated by the summation of PLOW,1 and PLOW,2.

ROCSET

IMAX RCOMP DCR



100

 R



----------------------------------------------------------

(EQ. 14)

2ms/DIV

OUTPUT CURRENT, 50A/DIV

FIGURE 14. OVERCURRENT BEHAVIOR IN HICCUP MODE

FSW = 500kHz

OUTPUT VOLTAGE,

500mV/DIV

PLOW 1



rDS ON



------





 2

–



ILPP

–



--------------------------------

(EQ. 15)

PLOW 2



VDON

 fS

------

IPP

---------



 t

------

IPP

---------

–







td2

(EQ. 16)

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