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WM9714CLGEFL/RV Datasheet(PDF) 96 Page - Cirrus Logic |
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WM9714CLGEFL/RV Datasheet(HTML) 96 Page - Cirrus Logic |
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96 / 120 page ![]() WM9714L 96 Rev 4.0 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 36h 15 CTRL 0 (GPIO reg) GPIO Pin Configuration Control 0 = GPIO pins used as GPIOs 1 = GPIO pins used as PCM interface PCM CODEC 14:13 MODE 10 (master mode) PCM Interface Mode Control 00 = PCM interface disabled 01 = Slave mode 10 = Master mode 11 = Partial master mode 11:9 DIV 010 (1/4) PCMCLK Rate Control 000 = Voice DAC clock 001 = Voice DAC clock / 2 010 = Voice DAC clock / 4 011 = Voice DAC clock / 8 100 = Voice DAC clock / 16 All other values are reserved 8 VDACOSR 0 (64x) Voice DAC Oversampling Rate Control 0 = 64 x fs 1 = 128 x fs 7 CP 0 (normal) PCMCLK Polarity Control 0 = Normal 1 = Inverted 6 FSP 0 FMT = 00, 01 or 10 FMT = 11 PCMFS Polarity Control 0 = Normal 1 = Inverted DSP Mode Control 0 = DSP Mode A 1 = DSP Mode B 5:4 SEL 00 (LandR data) PCM ADC Output Channel Control 00 = Normal stereo 01 = Reverse stereo 10 = Output left ADC data only 11 = Output right ADC data only 3:2 WL 10 (24 bits) PCM Data Word Length Control 00 = 16-bit 01 = 20-bit 10 = 24-bit 11 = 32-bit (not supported when FMT=00) 1:0 FMT 10 (I2S) PCM Data Format Control 00 = Right justified 01 = Left justified 10 = I2S 11 = DSP mode Register 36h controls the PCM CODEC. |
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