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TL7700CMPWPSEP Datasheet(PDF) 12 Page - Texas Instruments |
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TL7700CMPWPSEP Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 25 page ![]() tpo tpo RESET Vhys VCC 1.5 V T T Vs’ 12 TL7700-SEP SLVSF13 – MARCH 2019 www.ti.com Product Folder Links: TL7700-SEP Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Feature Description (continued) 8.3.3 Output Pulse-Duration Setting Constant-current charging starts on the timing capacitor when the sensing-line voltage reaches the TL7700-SEP sense voltage. When the capacitor voltage exceeds the threshold level of the output drive comparator, RESET changes from a low to a high level. The output pulse duration is the time between the point when the SENSE-pin voltage exceeds the threshold level and the point when the RESET output changes from a low level to a high level. When the TL7700-SEP is used for system power-on reset, the output pulse duration, tpo, must be set longer than the power rise time. The value of tpo is: tpo = Ct × 10 5 seconds where • Ct is the timing capacitor in farads (3) There is a limit on the device response speed. Even if Ct = 0, tpo is not 0, but approximately 5 µs to 10 µs. Therefore, when the TL7700-SEP is used as a comparator with hysteresis without connecting Ct, switching speeds (tr/tf, tpo/tpd, and so forth) must be considered. 8.4 Device Functional Modes Figure 20 describes how the RESET output pin responds to a change in the voltage at the SENSE pin. When the SENSE pin drops below 500 mV, the RESET pin is pulled low. NOTE: The sense voltage, Vs', is different from the SENSE terminal input voltage, Vs. Vs normally is 500 mV for triggering. Figure 20. VCC RESET Response and Timing |
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