ACT88326VA datasheet(24/41 Pages) ACTIVE-SEMI

24 / 41 page

ACT88326VA

Rev 1.0, 29-May-2018

Innovative PowerTM

www.active-semi.com

ActiveSwitcherTM is a trademark of Active-Semi.

If EN_PB_PWRCYCL and EN_PB_PWROFF are both

programmed to 1, asserting nPB for 4s-6s initiates the

Power Cycle1 sequence. Asserting nPB for >6s initiates

the Power Off sequence. If these bits are both

programmed to 0, both Power Cycle1 and Power Off are

disabled. These bits are factory set to a specific CMI

and cannot be changed.

Table 4 describes the functions available with the multi-

purpose push button pin (nPB pin).

Table 4: Summary of nPB Functions

GPIOx

The ACT88326 has four GPIO pins. Each GPIO is pro-

grammed for a specific function by the IC’s CMI. The

available functions are input triggers for sequencing

(EXT_PG), output triggers for sequencing (EXT_EN),

nRESET, nIRQ, DVS, voltage select pins for the voltage

regulators, LED drivers, and GPIO.

GPIO1 (pin D7). GPIO1 can be programmed for any of

the above functions except the LED drivers. It can be

programmed as an input or an open drain or push-pull

output.

GPIO2 (pin D6). GPIO2 is the same as GPIO1

GPIO3 (pin E6). GPIO3 can be programmed for all the

above functions including the LED drivers. It can be pro-

grammed as an input or an open drain output.

GPIO4 (pin C7). GPIO4 is the same as GPIO3

The GPIOs are 5.5V tolerant meaning they can go to

5.5V even if VIN_IO is less than 5.5V.

SCL, SDA

These are the I2C clock and data pins to the IC. They

have standard I2C functionality.

PGNDx

The PGNDx pins are the buck converter power ground

pins. They connect directly to the buck converters’ low

side FETs. Buck1 and Buck2 use pins D4, E4, and F4

(PGND12). Buck3 uses pin A5 (PGND3).

SWx

SWx are the switch nodes for the buck converters. They

connect directly to the buck inductor on the top layer.

FB_Bx

These are the feedback pins for the buck regulators.

They should be kelvin connected to the buck output ca-

pacitors.

LSG

LSG is the load switch FET gate drive pin.

LDOx

These are the LDO output pins. Each LDO output must

be bypassed to AGND with a 1uF capacitor.

AGND

AGND is the ground pin for the IC’s analog circuitry and

LDOs. AGND must be connected to the IC’s PGNDx

pins. The connection between AGND and the PGNDx

pins should not have high currents flowing through it.

Step-down DC/DC Converters

General Description

The ACT88326 contains three fully integrated step-

down converters. Buck1 is a 4A output, Buck2 and

Buck3 are 3A outputs. All buck converters are fixed

frequency, current-mode controlled, synchronous PWM

converters that achieve peak efficiencies of up to 95%.

The buck converters switch at 1.125MHz or 2.25MHz

and are internally compensated, requiring only three

small external components (Cin, Cout, and L) for

operation. The buck regulators minimize noise in

sensitive applications with the use of a switching phase

delay and offset. Additionally, all regulators are available

with a variety of standard and custom output voltages,

and may be software-controlled via the I2C interface for

systems that require advanced power management

functions.

ACT88326VA Datasheet(PDF) 24 Page - Active-Semi, Inc

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