56F8167 datasheet(113/184 Pages) FREESCALE

113 / 184 page

56F8367 Technical Data, Rev. 7.0

Freescale Semiconductor

113

Preliminary

6.5 Register Descriptions

Table 6-1 SIM Registers

(SIM_BASE = $00 F350)

Address Offset

Address Acronym

Section Location

Base + $0

SIM_CONTROL

Control Register

6.5.1

Base + $1

SIM_RSTSTS

Reset Status Register

6.5.2

Base + $2

SIM_SCR0

Software Control Register 0

6.5.3

Base + $3

SIM_SCR1

Software Control Register 1

6.5.3

Base + $4

SIM_SCR2

Software Control Register 2

6.5.3

Base + $5

SIM_SCR3

Software Control Register 3

6.5.3

Base + $6

SIM_MSH_ID

Most Significant Half of JTAG ID

6.5.4

Base + $7

SIM_LSH_ID

Least Significant Half of JTAG ID

6.5.5

Base + $8

SIM_PUDR

Pull-up Disable Register

6.5.6

Reserved

Base + $A

SIM_CLKOSR

CLKO Select Register

6.5.7

Base + $B

SIM_GPS

GPIO Peripheral Select Register

6.5.8

Base + $C

SIM_PCE

Peripheral Clock Enable Register

6.5.9

Base + $D

SIM_ISALH

I/O Short Address Location High Register

6.5.10

Base + $E

SIM_ISALL

I/O Short Address Location Low Register

6.5.10

Base + $F

SIM_PCE2

Peripheral Clock Enable Register 2

6.5.11

56F8167 Datasheet(PDF) 113 Page - Freescale Semiconductor, Inc

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