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VSC8504-02 Datasheet(PDF) 86 Page - Microsemi Corporation

Part # VSC8504-02
Description  Quad-Port 10/100/1000BASE-T PHY with Synchronous Ethernet and QSGMII/SGMII MAC
PDF  131 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC8504-02 Datasheet(HTML) 86 Page - Microsemi Corporation

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Registers
VMDS-10507 VSC8504-02 Datasheet Revision 4.2
75
4.5.10
Media SerDes Clause 37 Advertised Ability
The register at address 25E3 consists of the bits that provide access to and control over Media SerDes
Clause 37 advertised ability. The following table shows the settings available.
4.5.11
Media SerDes Clause 37 Link Partner Ability
The register at address 26E3 consists of the bits that provide status of the media SerDes link partner's
Clause 37 advertised ability. The following table shows the settings available.
4.5.12
Media SerDes Status
The register at address 27E3 consists of the bits that provide access to Media SerDes status. The
following table shows the settings available.
4.5.13
Fiber Media CRC Good Counter
Register 28E3 makes it possible to read the contents of the CRC good counter for packets that are
received on the Fiber media interface; the number of CRC routines that have executed successfully. The
following table shows the expected readouts.
Table 69 •
Media SerDes Cl37 Advertised Ability, Address 25E3 (0x19)
Bit
Name
Access Description
Default
15:0 Media SerDes
advertised ability
R/W
Current configuration code word being advertised.
This register is read/write when 23E3.11 = 1.
0x0000
Table 70 •
MAC SerDes Cl37 LP Ability, Address 26E3 (0x1A)
Bit
Name
Access Description
15:0 Media SerDes LP ability RO
Last configuration code word received from link partner
Table 71 •
Media SerDes Status, Address 27E3 (0x1B)
Bit
Name
Access Description
15
K28.5 comma realignment
RO
Self-clearing bit.
1: K28.5 comma re-alignment has occurred
14
Signal detect
RO
Self-clearing bit. Sticky bit.
1: SerDes media signal detect
13:0 Reserved
RO
Reserved
Table 72 •
Fiber Media CRC Good Counter, Address 28E3 (0x1C)
Bit
Name
Access Description
Default
15
Packet since last read
RO
Self-clearing bit.
1: Packet received since last read.
0
14
Reserved
RO
Reserved.
13:0 Fiber media CRC good
counter contents
RO
Self-clearing bit. Counter containing the
number of packets with valid CRCs. This
counter does not saturate and will roll over.
0x000



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