EM78P451SWM datasheet(10/54 Pages) EMC

10 / 54 page

EM78P451S

8-Bit Microcontroller with OTP ROM

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Product Specification (V1.0) 06.01.2004

(This specification is subject to change without further notice)

4.1.4 R3 (Status Register)

PS1

PS0

Bit7 (GP) General read/write bit.

Bit6 (PS1) ~ 5 (PS0) Page select bits. PS0~PS1 are used to pre-select a program

memory page. When executing a "JMP", "CALL", or other instructions which

causes the program counter to be changed (e.g. MOV R2, A), PS0~PS1 are

loaded into the 11th and 12th bits of the program counter where it selects

selecting one of the available program memory pages. Note that RET (RETL,

RETI) instruction does not change the PS0~PS1 bits. That is, the return will

always be to the page from where the subroutine was called, regardless of

the current setting of PS0~PS1 bits. PS1 bit is not used (read as "0") and

cannot be modified in EM78P451S.

PS1

PS0

Program memory page [Address]

Page 0 [000-3FF]

Page 1 [400-7FF]

Page 2 [800-BFF]

Page 3 [C00-FFF]

Bit 4 (T) Time-out bit. Set to 1 with the "SLEP" and the "WDTC" commands, or during

power up and reset to 0 with WDT timeout.

Bit 3 (P) Power down bit. Set to 1 during power on or by a "WDTC" command and

reset to 0 by a "SLEP" command.

Bit 2 (Z) Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero.

Bit 1 (DC) Auxiliary carry flag

Bit 0 (C) Carry flag

4.1.5 R4 (RAM Select Register)

Bits 7~6 determine which bank is activated among the 4 banks.

Bits 5~0 are used to select the registers (address: 00~3F) in the indirect addressing

mode.

If no indirect addressing is used, the RSR is used as an 8-bit general-purposed

read/writer register.

See the configuration of the data memory in Fig. 4.

EM78P451SWM Datasheet(PDF) 10 Page - ELAN Microelectronics Corp