EM78P451SWM datasheet(15/54 Pages) EMC

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EM78P451S

8-Bit Microcontroller with OTP ROM

Product Specification (V1.0) 06.01.2004

• 11

(This specification is subject to change without further notice)

4.2.2

CONT (Control Register)

/PHEN

/INT

PAB

PSR2

PSR1

PSR0

Bit 7 (/PHEN) I/O pin pull-high enable flag.

0: For P60~P67, P74~P75 and P90~P95, the pull-high function is enabled.

1: The pull-high function is disabled.

Bit 6 (INT) An interrupt enable flag cannot be written by the CONTW instruction.

0: interrupt masked by the DISI instruction.

1: interrupt enabled by the ENI or RETI instruction.

Bit5, 4

Not used, and to be read as “0”.

Bit 3 (PAB) Prescaler assignment bit.

0: TCC

1: WDT

Bit 2 (PSR2) ~ Bit 0 (PSR0) TCC/WDT prescaler bits.

PSR2

PSR1

PSR0

TCC Rate

WDT Rate

1:2

1:1

1:4

1:2

1:8

1:4

1:16

1:8

1:32

1:16

1:64

1:32

1:128

1:64

1:256

1:128

Bits 0~3, and 7 of the CONT register are readable and writable.

4.2.3

IOC5 ~ IOC9 (I/O Port Control Register)

"1" put the relative I/O pin into high impedance, while "0" put the relative I/O pin as

output.

Both P74 and P76 should not be defined as output pins at the same time. This also

applies to both P75 and P77.

Only the lower 6 bits of the IOC9 register are used.

4.2.4

IOCC (T1CON: Timer1 control register)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x0C

T1CON/IOCC

TM1E

TM1P1

TM1P0

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