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XRT75VL00D Datasheet(PDF) 90 Page - Exar Corporation |
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XRT75VL00D Datasheet(HTML) 90 Page - Exar Corporation |
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90 / 92 page ![]() XRT75VL00D E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.3 85 NOTE: The user can only disable the "SONET APS Recovery Time Mode" if the LIU is operating in the Host Mode. If the user is operating the LIU in the Hardware Mode, then the user will have NO ability to disable the "SONET APS Recovery Time Mode" feature. 9.8.4 How should one configure the LIU, if one needs to support "Daisy-Chain" Testing at the end Customer’s site? Daisy-Chain testing is emerging as a new requirements that many of our customers are imposing on our SONET Mapper and LIU products. Many System Designer/Manufacturers are finding out that whenever their end-customers that are evaluating and testing out their systems (in order to determine if they wish to move forward and start purchasing this equipment in volume) are routinely demanding that they be able to test out these systems with a single piece of test equipment. This means that the end-customer would like to take a single piece of DS3 or STS-1 test equipment and (with this test equipment) snake the DS3 or STS-1 traffic (that this test equipment will generate) through many or (preferably all) channels within the system. For example, we have had request from our customers that (on a system that supports OC-192) our silicon be able to support this DS3 or STS-1 traffic snaking through the 192 DS3 or STS-1 ports within this system. After extensive testing, we have determined that the best approach to complying with test "Daisy-Chain" Testing requirements, is to configure the Jitter Attenuator blocks (within each of the Channels within the LIU) into the "32-Bit" Mode. The user can configure the Jitter Attenuator block (within a given channel of the LIU) to operate in this mode by settings in the table below. REFERENCES 1. TEST REPORT - AUTOMATIC PROTECTION SWITCHING (APS) RECOVERY TIME TESTING WITH THE XRT94L43 DS3/E3/STS-1 TO STS-12 MAPPER IC - Revision C Silicon R/O R/O R/O R/WR/W R/WR/W R/W 00 0 00 011 JITTER ATTENUATOR CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X07 CHANNEL 1 ADDRESS LOCATION = 0X0F CHANNEL 2 ADDRESS LOCATION = 0X17 BIT 7BIT 6BIT 5BIT 4BIT 3 BIT 2BIT 1 BIT 0 Unused SONET APS Recovery Time Disable Ch_n JA RESET Ch_n JA1 Ch_n JA in Tx Path Ch_n JA0 Ch_n R/O R/O R/O R/W R/W R/W R/W R/W 00 000 11 0 JITTER ATTENUATOR CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X07 CHANNEL 1 ADDRESS LOCATION = 0X0F CHANNEL 2 ADDRESS LOCATION = 0X17 BIT 7BIT 6BIT 5 BIT 4BIT 3BIT 2BIT 1BIT 0 |
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