AM79C930 datasheet(59/161 Pages) AMD

59 / 161 page

P R E L I M I N A R Y

AMD

Am79C930

Am79C930 Device PCMCIA Mode Resource Requirements

Common

Attribute

Memory Range

Memory Size

I/O Range

I/O Size

Memory Range

Memory Size

0000h – 7FFFh

32 Kbytes

0000h – 0027h

0000h – 0803h

2 K+4 bytes

0 bytes

0000h – 000Fh

bytes

The I/O range is adjusted through bit 2 (EIOW = Expand

I/O Window) of SIR1 = Bank Switching Select register).

Note that since the Am79C930 device’s memory

mapped resources are all accessible through the Local

Memory

Address

and

I/O

Data

Ports

(SIR2,3,4,5,6,7), it is possible to assign the Am79C930

device no memory space. (This is accomplished by

setting the MemSpace field of the TPCE_FS byte of

the Configuration Table Entry Tuple to 00b. This will

inform the PCMCIA configuration utility that the

Am79C930-based design does not require any Com-

mon Memory space.) By assigning

no memory space to

the Am79C930 device, the Am79C930 device will

become an I/O only device. Such an arrangement may

be convenient for systems in which there is not enough

total available memory space to allow the Am79C930

device to use a full 32K block of memory.

Note that when this option is chosen, the total amount of

bus bandwidth required to perform all of the necessary

accesses to the Am79C930-based design will be in-

creased somewhat, because of the indirect nature of the

I/O method of access to Am79C930-based resources.

Note that the Am79C930 device always decodes

the lowest 6 bits of address when an I/O access is

performed with the Am79C930 device’s

CE1 signal ac-

tive. This means that there is aliasing of addresses in I/O

space. This decode function is unaffected by the setting

of the SIR1[2:0] register bits.

PCMCIA Common Memory Resources — While the

common memory space of the Am79C930 device only

accommodates access to 32 Kbytes of memory, the

Am79C930 device uses device select and bank select

bits in SIR1 in order to access a total of 256K of memory

space. Note that PCMCIA accesses to Common mem-

ory locations 7C00h–7FFFh (1K total space) will

some-

times correspond to the same physical locations as

PCMCIA accesses to Attribute memory locations

0000h–07FFh (2K total space), i.e., the correspon-

dence will occur only when the device and bank select

bits of SIR1 are pointing at the upper page of the 128K

Flash memory address space. (Note that for Attribute

memory accesses, only the even-valued addresses are

defined to exist. Therefore, 2K total Attribute memory

addresses have been mapped to 1K of physical space in

the Flash memory.) The following table indicates the

mapping of the 256 Kbytes of physical memory space

into the 32 Kbytes of Common memory:

Am79C930 Device PCMCIA Mode Common Memory Map

PCMCIA Address in

Common Memory

SIR1[5:3]

Size of Space

Physical Memory

0000h – 7FFFh

000

32 Kbytes

SRAM Memory 0 0000h – 0 7FFFh

0000h – 7FFFh

001

32 Kbytes

SRAM Memory 0 8000h – 0 FFFFh

0000h – 7FFFh

010

32 Kbytes

SRAM Memory 1 0000h – 1 7FFFh

0000h – 7FFFh

011

32 Kbytes

SRAM Memory 1 8000h – 1 FFFFh

0000h – 7FFFh

100

32 Kbytes

Flash Memory 0 0000h – 0 7FFFh

0000h – 7FFFh

101

32 Kbytes

Flash Memory 0 8000h – 0 FFFFh

0000h – 7FFFh

110

32 Kbytes

Flash Memory 1 0000h – 1 7FFFh

0000h – 7FFFh

111

32 Kbytes

Flash Memory 1 8000h – 1 FFFFh

TOTAL:

256 Kbytes

AM79C930 Datasheet(PDF) 59 Page - Advanced Micro Devices

AM79C930 Datasheet(HTML) 59 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL