MCP2517FD datasheet(59/98 Pages) MICROCHIP

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 2017-2018 Microchip Technology Inc.

DS20005688B-page 59

MCP2517FD

bit 12-8

F1BP<4:0>:

Pointer to FIFO when Filter 1 hits bits( 1)

1_1111

= Message matching filter is stored in FIFO 31

1_1110

= Message matching filter is stored in FIFO 30

........

0_0010

= Message matching filter is stored in FIFO 2

0_0001

= Message matching filter is stored in FIFO 1

0_0000

= Reserved FIFO 0 is the TX Queue and can’t receive messages

bit 7

FLTEN0:

Enable Filter 0 to Accept Messages bit

= Filter is enabled

= Filter is disabled

bit 6-5

Unimplemented:

Read as ‘0’

bit 4-0

F0BP<4:0>:

Pointer to FIFO when Filter 0 hits bits( 1)

1_1111

= Message matching filter is stored in FIFO 31

1_1110

= Message matching filter is stored in FIFO 30

........

0_0010

= Message matching filter is stored in FIFO 2

0_0001

= Message matching filter is stored in FIFO 1

0_0000

= Reserved FIFO 0 is the TX Queue and can’t receive messages

CiFLTCONm – FILTER CONTROL REGISTER m, (m = 0 TO 7) (CONTINUED)

Note 1:

This bit can only be modified if the corresponding filter is disabled (FLTEN = 0).

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