ADSP-SC571KSWZ-4 datasheet(23/142 Pages) AD

23 / 142 page

Rev. B

Page 23 of 142

June 2018

ADSP-SC570/SC571/SC572/SC573/ADSP-21571/21573

Board Support Packages (BSPs) for Evaluation Hardware

Software support for the EZ-KIT Lite evaluation boards and EZ-

Extender daughter cards is provided by software add ins called

board support packages (BSPs). The BSPs contain the required

drivers, pertinent release notes, and select example code for the

given evaluation hardware. A download link for a specific BSP is

located on the web page for the associated EZ-KIT or EZ-

Extender product.

Middleware Packages

Analog Devices offers middleware add ins such as real-time

operating systems, file systems, USB stacks, and TCP/IP stacks.

For more information, see the following web pages:

• www.analog.com/ucos2

• www.analog.com/ucos3

• www.analog.com/ucfs

• www.analog.com/ucusbd

• www.analog.com/ucusbh

• www.analog.com/lwip

Algorithmic Modules

To speed development, Analog Devices offers add ins that per-

form popular audio and video processing algorithms. These are

available for use with CrossCore Embedded Studio. For more

information visit www.analog.com.

Designing an Emulator-Compatible DSP Board (Target)

For embedded system test and debug, Analog Devices provides

a family of emulators. On each JTAG DSP, Analog Devices sup-

plies an IEEE 1149.1 JTAG test access port (TAP). In circuit

emulation is facilitated by use of this JTAG interface. The

emulator accesses the internal features of the processor via the

TAP, allowing the developer to load code, set breakpoints, and

view variables, memory, and registers.

The processor must be halted to send data and commands, but

once an operation is completed by the emulator, the DSP system

is set to run at full speed with no impact on system timing. The

emulators require the target board to include a header that sup-

ports connection of the JTAG port of the DSP to the emulator.

For details on target board design issues including mechanical

layout, single processor connections, signal buffering, signal ter-

mination, and emulator pod logic, see “Analog Devices JTAG

Emulation Technical Reference” (EE-68).

ADDITIONAL INFORMATION

This data sheet provides a general overview of the ADSP-

SC57x/ADSP-2157x architecture and functionality. For detailed

information on the core architecture and instruction set, refer to

the SHARC+ Core Programming Reference.

RELATED SIGNAL CHAINS

A signal chain is a series of signal-conditioning electronic com-

ponents that receive input (data acquired from sampling either

real-time phenomena or from stored data) in tandem, with the

output of one portion of the chain supplying input to the next.

Signal chains are often used in signal processing applications to

gather and process data or to apply system controls based on

analysis of real-time phenomena.

Analog Devices eases signal processing system development by

providing signal processing components that are designed to

work together well. A tool for viewing relationships between

specific applications and related components is available on the

www.analog.com website.

The application signal chains page in the Circuits from the Lab

site (www.analog.com\circuits) provides the following:

• Graphical circuit block diagram presentation of signal

chains for a variety of circuit types and applications

• Drill down links for components in each chain to selection

guides and application information

• Reference designs applying best practice design techniques

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