R5F56519FDFP datasheet(64/246 Pages) RENESAS

64 / 246 page

RX65N Group, RX651 Group

1. Overview

R01DS0276EJ0230 Rev.2.30

Page 64 of 246

Jun 20, 2019

Note 1. These pins are only enabled for products with 2 or 1.5 Mbytes of code flash memory.

Note 2. P53 is multiplexed with the BCLK pin function, so cannot be used as an I/O port pin when the external bus is enabled.

TRDATA3

P55

D0[A0/D0]*1/

WAIT#/

EDREQ0

MTIOC4D/

TMO3

ET0_EXOUT/

TXD7*1/

SMOSI7*1/

SSDA7*1/CRX1

IRQ10

VSS

PC7

A23/CS0#

MTIOC3A/

MTCLKB/

TMO2/PO31/

TOC0/

CACREF

ET0_COL/TXD8/

SMOSI8/SSDA8/

SMOSI10/

SSDA10/TXD10/

MISOA-A

MMC_D7-A

IRQ14

N10

TRSYNC

P82

EDREQ1

MTIOC4A/

PO28

ET0_ETXD1/

RMII0_TXD1/

SMOSI10/

SSDA10/TXD10

MMC_D4-A

N11

PC3

A19

MTIOC4D/

TCLKB/PO24

ET0_TX_ER/

TXD5/SMOSI5/

SSDA5

QMO-A/QIO0-A/

SDHI_D0-A/

SDSI_D0-A/

MMC_D0-A

N12

TRSYNC1

P75

CS5#

PO20

ET0_ERXD0/

RMII0_RXD0/

SCK11/RTS11#

SDHI_D2-A/

SDSI_D2-A/

MMC_RES#-A

N13

TRDATA5

P74

A20/CS4#

PO19

ET0_ERXD1/

RMII0_RXD1/

SS11#/CTS11#

Table 1.7

List of Pin and Pin Functions (145-Pin TFLGA) (7/7)

Number

Power Supply

Clock System

Control

I/O Port

Bus

EXDMAC

SDRAMC

Timer

Communication

Memory Interface

Camera Interface

GLCDC

Interrupt

A/D

D/A

145-Pin

TFLGA

(MTU, TPU,

TMR, PPG,

RTC, CMTW,

POE, CAC)

(ETHERC, SCI,

RSPI, RIIC,

CAN, USB)

(QSPI, SDHI, SDSI,

MMCIF, PDC)

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