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SPC58NH84C3 Datasheet(PDF) 60 Page - STMicroelectronics |
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SPC58NH84C3 Datasheet(HTML) 60 Page - STMicroelectronics |
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60 / 147 page ![]() Electrical characteristics SPC58EHx, SPC58NHx 60/147 DS12304 Rev 5 4.12.3 SAR ADC 10 bit electrical specification The ADC comparators are 10-bit Successive Approximation Register analog-to-digital converters with full capacitive DAC. The SARn architecture allows input channel multiplexing. Note: The functional operating conditions are given in the DC electrical specifications. Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the listed maximum may affect device reliability or cause permanent damage to the device. 4. Mode3: 6 sampling cycles + 10 conversion cycles at 16 MHz. 5. IADCREFH and IADCREFL are independent from ADC clock frequency. It depends on conversion rate: consumption is driven by the transfer of charge between internal capacitances during the conversion. 6. Current parameter values are for a single ADC. 7. TUE is granted with injection current within the range defined in Table 26, for parameters classified as T and D. 8. All channels of all SAR-ADC12bit and SAR-ADC10bit are impacted with same degradation, independently from the ADC and the channel subject to current injection. 9. DNL is granted with injection current within the range defined in Table 26, for parameters classified as T and D. Table 28. ADC-Comparator electrical specification Symbol C Parameter Conditions Value Unit Min Max fADCK SR P Clock frequency Standard frequency mode 7.5 13.33 MHz T High frequency mode >13.33 16.0 tADCINIT SR — ADC initialization time — 1.5 — µs tADCBIASINIT SR — ADC BIAS initialization time —5 — µs tADCINITSBY SR — ADC initialization time in standby Standby Mode 8 — µs tADCPRECH SR T ADC precharge time — 1/fADCK —µs ΔVPRECH SR D Precharge voltage precision TJ < 150 °C 0 0.25 V tADCSAMPLE SR P ADC sample time(1) 10-bit ADC mode, Fast channel 5/fADCK(2) —µs 10-bit ADC mode, Standard channel 6/fADCK —µs tADCEVAL SR P ADC evaluation time 10-bit ADC mode 10/fADCK — µs D ADC comparator mode 2/fADCK — IADCREFH(3),(4) CC T ADC high reference current Run mode (average across all codes) —7 µA Power Down mode — 1 ADC comparator mode — 19.5 |
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