SPC58NH84C3 datasheet(100/147 Pages) STMICROELECTRONICS

100 / 147 page

Electrical characteristics

SPC58EHx, SPC58NHx

100/147

DS12304 Rev 5

Note:

In the following table, all timing specifications are referenced from REF_CLK = 1.4 V to the

valid input levels, 0.8 V and 2.0 V.

Figure 35. RMII receive signal timing diagram

4.16.3.7

RMII transmit signal timing (TXD[1:0], TX_EN)

The transmitter functions correctly up to a REF_CLK maximum frequency of 50 MHz + 1%.

There is no minimum frequency requirement. The system clock frequency must be at least

equal to or greater than the TX_CLK frequency, which is half that of the REF_CLK

frequency.

The transmit outputs (TXD[1:0], TX_EN) can be programmed to transition from either the

rising or falling edge of REF_CLK, and the timing is the same in either case. This option

allows the use of non-compliant RMII PHYs.

Note:

In the following table, all timing specifications are referenced from REF_CLK = 1.4 V to the

valid output levels, 0.8 V and 2.0 V.

RMII transmit signal valid timing specified is considering the rise/fall time of the ref_clk on

the pad as 1 ns.

Table 52. RMII receive signal timing

Symbol

Characteristic

Value

Unit

Min

Max

CC D RXD[1:0], CRS_DV to REF_CLK setup

—

CC D REF_CLK to RXD[1:0], CRS_DV hold

—

CC D REF_CLK pulse width high

35%

65%

REF_CLK period

CC D REF_CLK pulse width low

35%

65%

REF_CLK period

REF_CLK (input)

RXD[1:0] (inputs)

CRS_DV

SPC58NH84C3 Datasheet(PDF) 100 Page - STMicroelectronics

SPC58NH84C3 Datasheet(HTML) 100 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL