SPC58NH84C3 datasheet(15/147 Pages) STMICROELECTRONICS

15 / 147 page

DS12304 Rev 5

15/147

SPC58EHx, SPC58NHx

Description

only difference is that, it can check for patterns sequentially (1 field at a time)

unlike fixed/register filtering which can compare in parallel and at line rate.

–

TSN features:

IEEE 802.1Qbv (EST)

IEEE 802.1AS-Rev/D2.0 (timing and synchronization)

IEEE 802.3br/D3.1 (frame preemption)

IEEE 802.1Qbu/D3.1 (frame preemption)

•

SD/SDIO/MMC host interface that supports:

–

eMMC - MultiMedia Card Specification v4.51

– 1-bit, 4-bit, 8-bit interface

– Full backward compatibility with legacy MMC cards (0-25 MHz), 25 MB/s

– Full High Speed SDR bus mode (0-50 MHz), 50 MB/s

– Full High Speed DDR bus mode (0-50 MHz), 100 MB/s

– 3.3 V IO voltage

–

SD Card Specification v3.01

– Full support for Default Speed mode (0-25 MHz), 12.5 MB/s

– Full support for High Speed (0-50 MHz) mode, 25 MB/s

– 1-bit, 4-bit interface

– 3.3 V IO voltage

–

SDIO Specification v3.0

– Full support for Default Speed mode (0-25 MHz) mode, 12.5 MB/s

– Full support for High Speed (0-50 MHz) mode, 25 MB/s

– 1-bit or 4-bit interface

– 3.3 V IO voltage

The current version supports only one SD3.01/SDIO3.0/MMC4.51 card at any one

time.

•

OctalSPI host interface that supports:

–

SPI mode

– 1-bit, 4-bit, 8-bit interface

– SDR for 1 bit interface only (SPI mode)

– SDR and DDR for 4 and 8 bits interface (quad and Octal SPI mode)

– 3.3 V IO voltage

– Clock up to 100 MHz

– SPI NOR device with DQS mode compliant

–

Hyperbus(TM) bus mode

– Compliant with “HyperBus™ Specification Low Signal Count, High

Performance DDR Bus”, June 2017, revision F

– DDR for 8-bit interface

– 3.3 V IO voltage

SPC58NH84C3 Datasheet(PDF) 15 Page - STMicroelectronics

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