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ST25R3918 Datasheet(PDF) 128 Page - STMicroelectronics |
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ST25R3918 Datasheet(HTML) 128 Page - STMicroelectronics |
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128 / 141 page ![]() Electrical characteristics ST25R3918 128/141 DS13490 Rev 2 13. Manual regulator mode, VDD = 3.6 V, regulated voltage set to 3.0 V, measured on pin VDD_RF: register 00h set to 0Fh, register 01h set to 80h (3 V supply mode), register 02h set to E8h (one channel RX, enable TX), 2Ch to D8h (3.0 V regulator), other registers in default state. Table 112. ST25R3918 electrical characteristics (VDD = 5.5 V) (1) (2) Symbol Parameter Conditions Min Typ Max Unit IPD Supply current in Power-down mode TJun = -40 to 25 °C (3) -1 3 µA TJun = 125 °C (3) -- 90 TJun = 85 °C - 2.5 25 INFCT Supply current in initial NFC target mode TJun = -40 to 25 °C (4) -3.4 8 TJun = 125 °C (4) -35 90 TJun = 85 °C - 5 25 IWU Supply current in Wake-up mode (logic and RC oscillator) TJun = -40 to 25 °C (5) -3 8 TJun = 125 °C (5) -15 90 TJun = 85 °C 5 25 IRD Supply current in Ready mode (6) -5.6 7.5 mA IAL Supply current all active (7) - 15.0 23.0 IAL-AM Supply current all active, AM (8) - 16.0 26.0 IAL1 Supply current all active single RX channel (9) - 11.0 16.0 RRFO RFO1 and RFO2 driver output resistance IRFO = 10 mA (10) -6.8 16 Ω RRFI RFI input resistance (10) (11) -12 16 kΩ VPOR Power on reset voltage - 1.00 1.45 2.00 V VAGDC AGDC voltage (7) 1.40 1.50 1.60 VREG Regulated voltage (7) (10) 4.3 4.6 5.0 1. Minimum and maximum values tested in production at 25 °C, other temperature values evaluated by characterization. 2. 5.0 V supply mode with VDD = 5.5 V unless specified otherwise. Regulated voltages set to 5.1 V (unless specified otherwise), 27.12 MHz Xtal connected to XTO and XTI. 3. Registers 00h to 07h (no clock on MCU_CLK), 01h to 00h (5 V supply mode), other registers in default state. 4. Registers 00h to 07h (no clock on MCU_CLK), 01h to 00h (5 V supply mode), 02h to 03h (external field detector enable), 03h to E8h (enable NFC Target mode), other registers in default state. 5. Registers 00h to 07h (no clock on MCU_CLK), 01h to 00h (5 V supply mode), 02h to 04h (enable Wake-up mode), 32h to 08h (100 ms timeout, IRQ at every timeout), other registers in default state. 6. Registers 00h to 07h (no clock on MCU_CLK), 01h to 40h (5 V supply mode, disable VDD_D), 02h to 80h (en = 1), 2Ch to F8h (5.1 V regulator), other registers in default state, short VDD_A and VDD_D. 7. Registers 00h to 07h (no clock on MCU_CLK), 01h to 40h (5 V supply mode, disable VDD_D), 02h to C8h (enable RX, enable TX), 28h to 7Fh (RFO segments disabled), 2Ch to F8h (5.1 V regulator), other registers in default state, short VDD_A and VDD_D. 8. Registers 00h to 07h (no clock on MCU_CLK), 01h to 40h (5 V supply mode, disable VDD_D), 02h to C8h (enable RX, enable TX), 03h to 14h (AM modulation), 28h to 7Fh (RFO segments disabled), 2Ch to F8h (5.1 V regulator), other registers in default state, short VDD_A and VDD_D. 9. Registers 00h to 07h (no clock on MCU_CLK), 01h to 40h (5 V supply mode, disable VDD_D), 02h to E8h (enable RX, 1 RX channel, enable TX), 28h to 7Fh (RFO segments disabled), 2Ch to D8h (4.7 V regulator), other registers in default state, short VDD_A and VDD_D. 10. Evaluated by characterization, not tested in production. |
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