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LNBH26S Datasheet(PDF) 12 Page - STMicroelectronics |
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LNBH26S Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 35 page ![]() Component Notes L1 With COMP=0, use 10 µH inductor with ISAT > IPEAK where IPEAK is the boost converter peak current or with COMP=1 and C2 = 22 µF, use 6.8 µH inductor with ISAT > IPEAK where IPEAK is the boost converter peak current Figure 7. DiSEqC 2.x application circuit L1- A C3 -A Vin 12 V LNBOUT -A LX-A VUP-A C4 LNBH26S D1- A C2 - A C1 Vcc D2-A Byp C7 FLT ADDR SDA SCL ISEL R1 (RSEL) LX- B D1-B C2 -B C3-B L1-B LNBOUT -B C5 - B DSQOUT-A DiSEqC Envelope TTL or DiSEqC 22KHz TTL DSQIN -A DSQIN-B Tone enable control VUP-B VOUT-B BPSW -B DSQOUT-B D2- B VOUT-A C5 - A BPSW-A 15 W L2- A TR1- A 4.7 k DETIN-A C6 -A 15 W L2 -B TR1 -B DETIN-B C6 -B 4.7 k Open drains to µcontroller { I 2C Bus 3 21 17 16 8 7 9 5 11 6 23 22 24 12 14 1 20 18 19 13 2 P-GND A-GND 4 15 D3- A D3 -B 10 k 4.7k 4.7 k 10 k (optional) (optional) GIPG2801151323LM Table 5. LNBH26S DiSEqC 2.x bill of material Component Notes R1 (RSEL) SMD resistor. Refer to Table 12. A/B section electrical characteristics and ISEL pin description in Table 1. Pin description. C1 > 25 V electrolytic capacitor, 100 µF or higher is suitable or > 25 V ceramic capacitor, 10 µF or higher is suitable C2 With COMP = 0, > 25 V electrolytic capacitor, 100 µF or higher is suitable or with COMP = 1, > 35 V ceramic capacitor, 22 µF (or 2 x 10 µF) or higher is suitable C3 From 470 nF to 2.2 µF ceramic capacitor placed as close as possible to VUP pins. Higher values allow lower DC-DC noise C5 From 100 nF to 220 nF ceramic capacitor placed as close as possible to VOUT pins. Higher values allow lower DC-DC noise C4, C7 220 nF ceramic capacitors. To be placed as close as possible to VOUT pin D1 STPS130A or similar Schottky diode LNBH26S Typical application circuits DS8975 - Rev 5 page 12/35 |
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