Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

LNBH26S Datasheet(PDF) 24 Page - STMicroelectronics

Part # LNBH26S
Description  Dual LNBS supply and control I2C with step-up and IC interface
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LNBH26S Datasheet(HTML) 24 Page - STMicroelectronics

Back Button LNBH26S Datasheet HTML 20Page - STMicroelectronics LNBH26S Datasheet HTML 21Page - STMicroelectronics LNBH26S Datasheet HTML 22Page - STMicroelectronics LNBH26S Datasheet HTML 23Page - STMicroelectronics LNBH26S Datasheet HTML 24Page - STMicroelectronics LNBH26S Datasheet HTML 25Page - STMicroelectronics LNBH26S Datasheet HTML 26Page - STMicroelectronics LNBH26S Datasheet HTML 27Page - STMicroelectronics LNBH26S Datasheet HTML 28Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 24 / 35 page
background image
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
EffDC/DC
DC-DC converter
efficiency
IOUT = 500 mA
93
%
FSW
DC-DC converter
switching frequency
440
kHz
UVLO
Undervoltage lockout
thresholds
UVLO threshold rising
4.8
V
UVLO threshold falling
4.7
VLP
Low power diagnostic
(LPD) thresholds
VLP threshold rising
7.2
V
VLP threshold falling
6.7
VIL
DSQIN, pin logic low
0.8
V
VIH
DSQIN, pin logic high
2
V
IIH
DSQIN, pin input current
VIH = 5 V
15
µA
FDETIN
Tone detector frequency
capture range
0.4 VPP sine wave (3)
19
22
25
kHz
VDETIN
Tone detector input
amplitude
Sine wave signal, 22 kHz
0.3
1.5
VPP
ZDETIN
Tone detector input
impedance
150
kΩ
VOL
DSQOUT, FLT pin logic
LOW
DETIN tone present, IOL = 2 mA
0.3
0.5
V
VOL_BPSW
BPSW pin low voltage
IOL_BPSW = 5 mA
DSQIN = high, EXTM = 0,
TEN = 1
0.7
V
IOZ
DSQOUT, FLT pin
leakage current
DETIN tone absent, VOH = 6 V
10
µA
IOBK
Output backward current
All VSELx = 0, VOBK = 30 V
-3
-6
mA
ISINK
Output low-side sink
current
VOUT forced at VOUT_nom
+0.1 V
70
mA
ISINK_TIME-OUT
Low-side sink current
time-out
VOUT forced at VOUT_nom
+0.1 V
PDO I²C bit is set to 1 after this
time is elapsed
10
ms
IREV
Max. reverse current
VOUT forced at VOUT_nom
+ 0.1 V,
after PDO bit is set to 1
(ISINK_TIME-OUT elapsed)
2
mA
TSHDN
Thermal shutdown
threshold
150
°C
DTSHDN
Thermal shutdown
hysteresis
15
°C
1. In applications where (VCC - VOUT) > 1.3 V, the increased power dissipation inside the integrated LDO must be taken into
account in the application thermal management design.
2. Guaranteed by design.
3. Frequency range in which the DETIN function is guaranteed. The Vpp level is intended on the LNB bus (before the C6
capacitor. See typical application circuit for DiSEqC 2.x) IOUT from 0 to 750 mA, CBUS from 0 to 750 nF.
LNBH26S
Electrical characteristics
DS8975 - Rev 5
page 24/35



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com