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TDA7803A-QLX Datasheet(PDF) 38 Page - STMicroelectronics |
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TDA7803A-QLX Datasheet(HTML) 38 Page - STMicroelectronics |
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38 / 72 page ![]() I2S and TDM bus interface TDA7803A 38/72 DS12195 Rev 7 8 I2S and TDM bus interface The audio input port is a three/four-wire synchronous serial interface that can operate only as Slave. Pins SD13 and SD24 are the serial data inputs. The audio data format accepted from TDA7803A is the I2S standard. Input data can also be sent in time division multiplexed (TDM). Pins SCK (bit clock) and WS (frame select) complete the I2S interface. When I2S-clk is lost during amplifier operations a protection circuit acts and puts the amplifier in a safe condition: amplifier short circuit protections are guaranteed, dump protection is guaranteed, signal is muted and outputs bias is under control. In order to avoid other side effects user should put the amplifier in standby moving STBY pin to 0 V. 8.1 I2S and TDM input data frame format The audio data word length for each channel may be up to 24 bit. Either for I2S or TDM mode, the frame for each channel has 32 bit length. The following table summarizes the frequencies configurations. Table 11. System input frequencies Frequency sampling (Fs) System clock frequency (fSCK), (MHz) I2S standard TDM 4ch TDM 8ch/8+8ch 44.1 (kHz) 2.8224 5.6448 11.2896 48 (kHz) 3.072 6.144 12.288 96 (kHz) 6.144 12.288 24.576 192 (kHz) 12.288 24.576 N.A. |
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