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L9788 Datasheet(PDF) 137 Page - STMicroelectronics |
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L9788 Datasheet(HTML) 137 Page - STMicroelectronics |
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137 / 264 page  DS12308 Rev 4 137/264 L9788 Inductive sensor interface 263 Figure 57. Hysteresis application The output of the zero crossing comparator can be further processed by a filtering circuit or directly routed to FLW_OUT. 11.2.1 VRS normal mode configurations L9788 integrates two main configurable architectures: VRS_A and VRS_B. These architectures are selected in VRS register, VRS_MODE_SEL bit in CONFIG_REG 2. Once VRS_A (VRS_MODE_SEL =1) or VRS_B (VRS_MODE_SEL =0) has been configured, hysteresis and filtering strategy are defined through VRS_MODE[1:0] bit in the same CONFIG_REG 8 register: VRS_MODE[1] defines filtering function (OFF/ON and if ON, its time value) VRS_MODE[0] defines the hysteresis (manual or adaptive) Table 57 summarizes the parameters of VRS_A and VRS_B architecture; the next paragraphs detail the two configurations. In case a change of VRS_MODE_SEL bit within the normal operating mode occurs (1->0 or 0->1) with hysteresis current active, this leads to the change of the hysteresis (to HI1 or HI3, GADG0612160927PS Table 57. VRS_A, VRS_B hysteresis and filter time definition VRS_MODE _SEL VRS _MODE[1:0] Filter Hyst. VRS_A configuration 1 00 OFF 0 µs Manual Ref to VRS_A - Manual Hysteresis 1 01 OFF 0 µs Full adaptive Ref. to VRS_A - Fully Adaptive Hysteresis 1 10 ON T(n-1)/32 Manual Ref to VRS_A - Manual Hysteresis 1 11 ON T(n-1)/32 Full adaptive Ref. to VRS_A - Fully Adaptive Hysteresis VRS_B configuration 0 00 OFF 0 µs Manual Ref. to VRS_B - Manual Hysteresis 0 01 OFF 0 µs Limited adaptive Ref. to VRS_B -Limited Adaptive Hysteresis 0 10 ON 4 µs Manual Ref. to VRS_B - Manual Hysteresis 0 11 ON 4 µs Limited adaptive Ref. to VRS_B -Limited Adaptive Hysteresis |
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