L9788 datasheet(26/264 Pages) STMICROELECTRONICS

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L9788

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DS12308 Rev 4

Figure 3. Thermal simulation set-up

2.4

Functional range

4 layer board

PCB

metal plate

Picture not to scale

Vias

TIM

- Thermal simulations carried on using typical boundaries for ECU applications:

- 4 layer board with thermal vias

- metal plate in contact with board

- Thermal interface material (TIM) between PCB and metal plate

With these boundaries and

considering uniform power on

overall chip surface, ST

package thermal resistance is:

ThetaJ-A = 10 °C/W

Boundary conditions

- TAMB = 135 °C / natural convection

GADG2411161145PS

Table 7. Functional range

Symbol

Parameter

Note

Min

Typ

Max

Unit

Cranking

condition

u-chip in cranking condition, reduced

operation range, main relay and

delayed off power stages keep the

status if delay-off function is triggered.

All other driver/regulators/CAN/LIN are

in off condition. See description in the

Reset Matrix Table, Section 12.10.

3.1

4.8

VB_IN

Low drop

condition

u-chip in low drop operation condition,

all functions are guaranteed all

parametersare guaranteed unless

specified. Vpre and VDD5 are in low

drop condition

4.8

VB_IN

Normal

condition

u-chip in normal operation condition. all

functions and parameters are

guaranteed, considering the description

range of electrical characteristic table

and parameters test set up

VB_IN

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