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L9788 Datasheet(PDF) 207 Page - STMicroelectronics |
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L9788 Datasheet(HTML) 207 Page - STMicroelectronics |
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207 / 264 page ![]() DS12308 Rev 4 207/264 L9788 Micro second channel (MSC) interface 263 18.5.15 CONFIG-REG 15 Application note: the minimum time distance between two consecutive accesses to the Wake up timer SET registers is 2.5 µs. Wake up timer_SET_x Bits go to, and are stored, in Wake Up Timer Logic. Wake up timer_SET_x regs can be written only when WAKE_UP_TIMER_EN_SEL=0 (CONFIG_REG20 D2, MSC Start/Stop) and WAKE_UP_TIMER_START_STOP[0:1]=10 (CONFIG_REG1 D6-D7, Stop condition). C 0 C 1 C 2 C 3 C 4 C 5 C 6 D0 D1 D2 D3 D4 D5 D6 D7 CONFIG- REG15-0 (WUPT_0) 1 0 0 0 0 1 1 0 0 Wake up timer_SET_0[0:5] RW DEFAULT 0 0 0 0 0 0 CONFIG- REG15-1 (WUPT_1) 1 0 0 0 0 1 0 0 1 Wake up timer_SET_1[6:11] RW DEFAULT 0 0 0 0 0 0 CONFIG- REG15-2 (WUPT_2) 1 0 0 0 0 1 0 1 0 Wake up timer_SET_2[12:17] RW DEFAULT 0 0 0 0 0 0 CONFIG- REG15-3 (WUPT_3) 1 0 0 0 0 1 1 1 1 Wake up timer_SET_3[23:18] RW DEFAULT 0 0 0 0 0 0 RESET SOURCE D2:D7 The read bits are from satellite logic on VB_STBY and are not affected by reset matrix ACTIVATION D2:D7 bits active as level CONTROL ACCESS D2:D7 not locked bits |
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