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STM32W108CB Datasheet(PDF) 251 Page - STMicroelectronics

Part # STM32W108CB
Description  High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory
PDF  278 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32W108CB Datasheet(HTML) 251 Page - STMicroelectronics

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Electrical characteristics
Doc ID 16252 Rev 14
251/278
Table 59 lists other specifications for the ADC not covered in Table 56, Table 57, and
Table 58.
VREF
VREF output current
VREF load capacitance
External VREF voltage range
External VREF input impedance
Minimum input voltage
Maximum input voltage
Single-ended signal range
Differential signal range
Common mode range
Input referred ADC offset
Input Impedance
Note:
The signal-ended ADC measurements are limited in their range and only guaranteed for
accuracy within the limits shown in this table. The ADC's internal design allows for
measurements outside of this range (±200 mV) when the input buffer is disabled, but the
accuracy of such measurements is not guaranteed. The maximum input voltage is of more
interest to the differential sampling where a differential measurement might be small, but a
common mode can push the actual input voltage on one of the signals towards the upper
voltage limit.
Table 59.
ADC characteristics
Parameter
Min.
Typ.
Max.
Units
1.17
1.2
1.23
V
––
1
mA
–
–
10
nF
1.1
1.2
1.3
V
1–
–
M
Ω
Input buffer disabled
Input buffer enabled
0
0.1
–
–
–
–
V
Input buffer disabled
Input buffer enabled
–
–
–
–
VREF
VDD_PADS - 0.1
V
Input buffer disabled
Input buffer enabled
0
0.1
–
–
VREF
VDD_PADS – 0.1
V
Input buffer disabled
Input buffer enabled
-VREF
-VDD_PADS + 0.1
–
–
+VREF
+VDD_PADS - 0.1
V
Input buffer disabled
Input buffer enabled
0
VDD_PADS/2
VREF
V
-10
–
10
mV
1 MHz sample clock
6 MHz sample clock
Not sampling
1
0.5
10
–
–
–
–
–
–
M
Ω



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