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UPSD3422 Datasheet(PDF) 122 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 122 Page - STMicroelectronics |
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122 / 300 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) IrDA interface UPSD3422, UPSD3433, UPSD3434, UPSD3454 122/300 Table 74. Recommended CDIV[4:0] values to generate SIRClk (default CDIV[4:0] = 0Fh, 15 decimal) fOSC (MHz) Value in CDIV[4:0] Resulting fSIRCLK (MHz) 40.00 16h, 22 decimal 1.82 36.864, or 36.00 14h, 20 decimal 1.84, or 1.80 24.00 0Dh, 13 decimal 1.84 11.059, or 12.00 06h, 6 decimal 1.84, or 2.00 7.3728(1) 1. When PULSE bit = 0 (fixed data pulse width), this is minimum recommended fOSC because CDIV[4:0] must be 4 or greater. 04h, 4 decimal 1.84 Obsolete Product(s) - Obsolete Product(s) |
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