UPSD3422EB40U6 datasheet(233/300 Pages) STMICROELECTRONICS

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28.5.38

MCU I/O mode

In MCU I/O mode, the 8032 on the MCU module expands its own I/O by using the I/O Ports

on the PSD module. The 8032 can read PSD module I/O pins, set the direction of the I/O

Latched address output

Yes

Latched address

output mode on

page 238

Peripheral I/O mode

Yes

Peripheral I/O mode

on page 239

JTAG ISP

Yes(2)

JTAG ISP mode on

page 240

MCELLBC outputs available only on pins PC2, PC3, PC4, and PC7.

JTAG pins (PC0/TMS, PC1/TCK, PC5/TDI, PC6/TDO) are dedicated to JTAG pin functions (cannot be

used for general I/O).

Table 177.

Port configuration setting requirements

Port

operating

mode

Required action in

PSDsoft Express to

configure each pin

Value that 8032

writes to csiop

control register

at run-time

Value that 8032

writes to csiop

direction register at

run-time

Value that 8032

writes to Bit 7

(PIO_EN) of csiop

VM register at run-

time

MCU I/O

Choose the MCU I/O

function and declare

the pin name

Logic '0' (default)

Logic 1 = out of uPSD

Logic 0 = into uPSD

N/A

PLD I/O

Choose the PLD

function type, declare

pin name, and specify

logic equation(s)

N/A

Direction register has

no effect on a pin if

pin is driven from

OMC output

N/A

Latched

address output

Choose Latched

Address Out function,

declare pin name

Logic '1'

Logic '1' Only

N/A

Peripheral I/O

Choose Peripheral I/O

mode function and

specify address range

in DPLD for PSELx

N/A

PIO_EN bit = logic 1

(default is '0')

4-PIN JTAG

ISP

No action required in

PSDsoft to get 4-pin

JTAG. By default TDO,

TDI, TCK, TMS are

dedicated JTAG

functions.

N/A

6-PIN JTAG

ISP (faster

programming)

Choose JTAG TSTAT

function for pin PC3

and JTAG TERR

function for pin PC4.

N/A

Table 176.

Port operating modes (continued)

Port operating mode

Port A (80-pin

only)

Port B

Port C

Port D

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UPSD3422EB40U6 Datasheet(PDF) 233 Page - STMicroelectronics

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