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EFP01 Datasheet(PDF) 47 Page - Silicon Laboratories

Part # EFP01
Description  EFP01 Energy Friendly PMIC Family
PDF  158 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EFP01 Datasheet(HTML) 47 Page - Silicon Laboratories

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Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
DC line regulation
LINEREG
Buck-only or Buck w/LDO4
1.76
mV/V
LDO mode4
1.32
mV/V
DC load regulation
LOADREG
Buck-only or Buck w/LDO4
0.07
mV/mA
LDO mode4
0.116
mV/mA
Output voltage range, coarse
regulator enabled1
VVOB_COARSE
EM4, 0 µA < ILOAD < 100 µA
1.69
MIN(3.40,
VDDB)
V
Output load current, coarse
regulator enabled1
ILOAD_COARSE
EM4, VOB output within
V_VOB_COARSE range
100
µA
Nominal inductor (20% Tol-
erance)
LDCDCB
VDDB - VOB > 3.0V
3.3
µH
VDDB - VOB ≤ 3.0V
2.2
µH
Startup time from output en-
abled to output within 1% of
final target voltage6,7
TSTART
Wired buck / wired buck with LDO
(VOB), BK_IPK = 18, ILOAD = 10
mA
193
µs
Note:
1. For certain OPN variants, VOB is expected to drive an output in the range of 1.1V to 1.2V, and the maximum output voltage of the
converter is internally limited to 1.26V. Any programmed VOB_EM0_V or VOB_EM2_V values that would result in a voltage high-
er than 1.26V will not affect the output voltage. In addition, for these OPNs, the VOB coarse regulator and bypass functionality is
disabled in hardware (i.e., setting the enable bit has no effect).
2. Maximum output load current is determined by first measuring the output voltage with a 5mA load. Maximum output load is the
the maximum load at which measured output voltage is no lower than 50mV from the original 5mA load measured voltage.
3. With less than 660 mV of headroom in buck mode, TON will be limited and the desired peak current can never be reached, result-
ing in a reduction in output load current. BK_TON_MAX = 7 (2030ns) supports the lowest headroom.
4. Specifications assume minimum headroom requirement has been met if (i.e., VDDB - VOB > 660mV, if operating in buck DCDC
mode, or VDDB - VOB > 365mV, if operating in LDO mode).
5. In Single-Cell Boost (EFP0108) and Boost Bootstrap (EFP0111) configurations, the DCDC B input (VDDB) is powered by the
DCDC A output (VOA). Therefore, the maximum output current of DCDC B will also be limited by the maximum output current of
the DCDC A converter.
6. For converters enabled by default, total startup time will be TSTART + TBOOT (found in the General Operating Conditions table)
7. For the EFP0109/11 OPNs where the VOB converter is enabled by default, the VOB converter won't be enabled until the VOA
converter has reached regulation.
EFP01 Energy Friendly PMIC Family Data Sheet
Electrical Specifications
silabs.com | Building a more connected world.
Rev. 1.3 | 47



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