9LPRS477D

PROGRAMMABLE SYSTEM CLOCK CHIP FOR ATI RD790-K8TM BASED SYSTEMS

IDT®

PROGRAMMABLE SYSTEM CLOCK CHIP FOR ATI RD790-K8TM BASED SYSTEMS

15

9LPRS477D

REV C 010715

SMBUS Table: CPU PLL DOC 1 N programming Register (1 pin control : DOC = 1; 2 pin control : DOC [0:1] = 01)

Byte

32

Name

Control Function

Type

0

1

Default

Bit 7

N Div10

RW

X

Bit 6

N Div9

RW

X

Bit 5

N Div8

RW

X

Bit 4

N Div7

RW

X

Bit 3

N Div6

RW

X

Bit 2

N Div5

RW

X

Bit 1

N Div4

RW

X

Bit 0

N Div3

RW

X

SMBUS Table: CPU PLL DOC 2 N programming Register (1 pin control : DOC = 1; 2 pin control : DOC [0:1] = 10)

Byte

33

Name

Control Function

Type

0

1

Default

Bit 7

N Div10

RW

X

Bit 6

N Div9

RW

X

Bit 5

N Div8

RW

X

Bit 4

N Div7

RW

X

Bit 3

N Div6

RW

X

Bit 2

N Div5

RW

X

Bit 1

N Div4

RW

X

Bit 0

N Div3

RW

X

SMBUS Table: CPU PLL DOC 3 N programming Register (1 pin control : DOC = 1; 2 pin control : DOC [0:1] = 11)

Byte

34

Name

Control Function

Type

0

1

Default

Bit 7

N Div10

RW

X

Bit 6

N Div9

RW

X

Bit 5

N Div8

RW

X

Bit 4

N Div7

RW

X

Bit 3

N Div6

RW

X

Bit 2

N Div5

RW

X

Bit 1

N Div4

RW

X

Bit 0

N Div3

RW

X

SMBUS Table: ATIG PLL DOC 1 N programming Register (1 pin control : D OC = 1; 2 pin control : DOC [0:1] = 01)

Byte

35

Name

Control Function

Type

0

1

Default

Bit 7

N Div10

RW

X

Bit 6

N Div9

RW

X

Bit 5

N Div8

RW

X

Bit 4

N Div7

RW

X

Bit 3

N Div6

RW

X

Bit 2

N Div5

RW

X

Bit 1

N Div4

RW

X

Bit 0

N Div3

RW

X

SMBUS Table: ATIG PLL DOC 2 N programming Register (1 pin control : D OC = 1; 2 pin control : DOC [0:1] = 10)

Byte

36

Name

Control Function

Type

0

1

Default

Bit 7

N Div10

RW

X

Bit 6

N Div9

RW

X

Bit 5

N Div8

RW

X

Bit 4

N Div7

RW

X

Bit 3

N Div6

RW

X

Bit 2

N Div5

RW

X

Bit 1

N Div4

RW

X

Bit 0

N Div3

RW

X

SMBUS Table: ATIG PLL DOC 3 N programming Register (1 pin control : D OC = 1; 2 pin control : DOC [0:1] = 11)

Byte

37

Name

Control Function

Type

0

1

Default

Bit 7

N Div10

RW

X

Bit 6

N Div9

RW

X

Bit 5

N Div8

RW

X

Bit 4

N Div7

RW

X

Bit 3

N Div6

RW

X

Bit 2

N Div5

RW

X

Bit 1

N Div4

RW

X

Bit 0

N Div3

RW

X

N Divider Programming Byte20

bit(7:0) and Byte19 bit(7:6)

The decimal representation of M and N Divider in Byte 16 and 32 will

configure the VCO frequency. Default at power up = Byte 3 Rom

table. See M/N Caculation Tables for VCO frequency formulas.

N Divider Programming Byte20

bit(7:0) and Byte19 bit(7:6)

The decimal representation of M and N Divider in Byte 16 and 33 will

configure the VCO frequency. Default at power up = Byte 3 Rom

table. See M/N Caculation Tables for VCO frequency formulas.

N Divider Programming Byte20

bit(7:0) and Byte19 bit(7:6)

The decimal representation of M and N Divider in Byte 16 and 34 will

configure the VCO frequency. Default at power up = Byte 3 Rom

table. See M/N Caculation Tables for VCO frequency formulas.

N Divider Programming Byte20

bit(7:0) and Byte19 bit(7:6)

The decimal representation of M and N Divider in Byte 26 and 35 will

configure the VCO frequency. Default at power up = Byte 5 Rom

table. See M/N Caculation Tables for VCO frequency formulas.

N Divider Programming Byte20

bit(7:0) and Byte19 bit(7:6)

The decimal representation of M and N Divider in Byte 26 and 36 will

configure the VCO frequency. Default at power up = Byte 5 Rom

table. See M/N Caculation Tables for VCO frequency formulas.

N Divider Programming Byte20

bit(7:0) and Byte19 bit(7:6)

The decimal representation of M and N Divider in Byte 26 and 37 will

configure the VCO frequency. Default at power up = Byte 5 Rom

table. See M/N Caculation Tables for VCO frequency formulas.