AT25QL641 datasheet(34/80 Pages) RENESAS

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DS-AT25QL641-130 Rev. G

Page 34

Sep 14, 2022

AT25QL641 Datasheet

8.14 Fast Read Quad I/O (EBh)

The Fast Read Quad I/O command reduces cycle overhead through quad access using four I/O pins: I/O0,

I/O1, I/O2, and I/O3. The Quad Enable bit (QE) of Status Register-2 must be set to enable the Fast read Quad

I/O Command.

Continuous Read Mode

The Fast Read Quad I/O command can further reduce command overhead through setting the Mode bits (M7-

0) with following the input address bits (A23-0), as shown in Figure 22. The upper nibble of the mode (M7-4)

controls the length of the next Fast Read Quad I/O command through the inclusion or exclusion of the first byte

command code. The lower nibble bits of the Mode (M3-0) are don't care (X). However, the I/O pins should be

high-impedance prior to the falling edge of the first data out clock. Note that the mode bits are counted as dummy

clocks.

If the Mode bits (M7-0) equal Ax hex, then the next Fast Read Quad I/O command (after CS is raised and then

lowered) does not require the EBh command code, as shown in Figure 23. This reduces the command sequence

by eight clocks and allows the address to be immediately entered after CS is asserted low. If the Mode bits (M7-

0) are any value other than Ax hex, the next command (after CS is raised and then lowered) requires the first byte

command code, thus retuning normal operation. A Mode Bit Reset can be used to reset Mode Bits (M7-0) before

issuing normal commands.

Figure 22. Fast Read Quad I/O Command (Initial command or previous M7-0 ≠ Axh, SPI mode)

Figure 23. Fast Read Quad I/O Command (previous M7-0 = Axh, SPI mode)

Wrap Around in SPI mode

D6 D2

D7 D3

D6 D2

D7 D3

MSB

Output

Data

Byte 1

MSB

Output

Data

Byte 2

Dummy

Byte

Dummy

Byte

M6 M2

M7 M3

MSB

11101011

Opcode (EBh)

High-Impedance

MSB

Mode

Byte

A20 A16 A12 A8 A4 A0

A21 A17 A13 A9 A5 A1

A22 A18 A14 A10 A6 A2

A23 A17 A15 A11 A7 A3

Address Bits A23-A0

MSB

410 11

121314151617181920212223

I/O0

SCK

I/O1

I/O2

I/O3

Byte 1

Dummy

Byte 2

A23-16

A15-8

A7-0

M7-0

SCK

2345

10111213

1415

Mode 3

Mode 0

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