AT25QL641 datasheet(68/80 Pages) RENESAS

68 / 80 page

DS-AT25QL641-130 Rev. G

Page 68

Sep 14, 2022

AT25QL641 Datasheet

8.38 Read Security Register (2Bh)

The Read Security Register can read the value of Security Register bits at any time (even in program/erase/write

status register-1 and write status register-2 condition) and continuously. Bits 0 and 1 of this register are described

below. All other bits of the register are reserved.

Secured OTP Indicator bit. The Secured OTP indicator bit shows the chip is locked by factory before or not.

When it is 0, it indicates a non-factory lock, a 1 indicates a factory lock.

Lock-down Secured OTP (LDSO) bit. By executing the Write Security Register command, the LDSO bit may be

set to 1 for customer lock down purposes. However, once the bit it set to 1 (locked down), the LDSO bit and the 4-

kbit Secured OTP area cannot be updated any more. While it is in 4-kbit Secured OTP mode, array access is not

allowed to write.

Figure 62. Read Security Register Command (SPI Mode)

Figure 63. Read Security Register Command (QPI Mode)

Table 18. Security Register Definition

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LDSO (indicate if lock-

down)

Secured OTP

indicator bit

Reserved

0 = not lock-down

1 = lock- down

(cannot program/

erase OTP)

0 = non factory lock

1 = factory lock

Volatile bit

Non- Volatile bit

Command

High-Impedance

Command

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