HC05RC16GRSSLASHD datasheet(20/122 Pages) NXP

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General Description

General Release Specification

MC68HC05RC16 — Rev. 3.0

General Description

PB2PU — Port B2 Pullup/Interrupt

This option enables or disables the pullup/interrupt on port B, bit 2.

1 = Enables pullup/interrupt

0 = Disables pullup/interrupt

PB1PU — Port B1 Pullup/Interrupt

This option enables or disables the pullup/interrupt on port B, bit 1.

1 = Enables pullup/interrupt

0 = Disables pullup/interrupt

PB0PU — Port B0 Pullup/Interrupt

This option enables or disables the pullup/interrupt on port B, bit 0.

1 = Enables pullup/interrupt

0 = Disables pullup/interrupt

COPEN — COP Enable

When the COP option is selected (COPEN = 1), the COP watchdog

timer is enabled.

When the COP option is deselected (COPEN = 0), the COP watchdog

timer is disabled.

STOPEN — STOP Instruction Enable

When the STOP option is selected (STOPEN = 1), the STOP

instruction is enabled.

When the STOP option is deselected (STOPEN = 0), the STOP

instruction is equivalent to a WAIT instruction.

IRQ — IRQ sensitivity

When the IRQ option is selected (IRQ = 1), edge- and level-sensitive

IRQ is enabled.

When the IRQ option is deselected (IRQ = 0), edge-only sensitive IRQ

is enabled.

NOTE:

The port B keyscan interrupt sensitivity will match that of the IRQ

sensitivity. (See 4.7 External Interrupt (IRQ/Port B Keyscan) for more

information.)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC05RC16GRS/D Datasheet(PDF) 20 Page - NXP Semiconductors