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HC05RC16GRS/D Datasheet(PDF) 31 Page - NXP Semiconductors |
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HC05RC16GRS/D Datasheet(HTML) 31 Page - NXP Semiconductors |
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31 / 122 page  Memory Input/Output Programming MC68HC05RC16 — Rev. 3.0 General Release Specification Memory 2.3.3 RAM The user RAM consists of 352 bytes of a shared stack area. The RAM starts at address $0020 and ends at address $017F. The stack begins at address $00FF. The stack pointer can access 64 bytes of RAM in the range $00FF to $00C0. NOTE: Using the stack area for data storage or temporary work locations requires care to prevent it from being overwritten due to stacking from an interrupt or subroutine call. 2.4 Input/Output Programming In user mode, 20 lines (28-pin PDIP or 28-pin SOIC) or 24 lines (44-lead PLCC) are arranged as three 8-bit I/O ports. These ports are programmable as either inputs or outputs under software control of the data direction registers. For detailed information, refer to Section 7. Parallel Input/Output (I/O). Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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