ISL70003ASEH datasheet(1/36 Pages) RENESAS

Part #	ISL70003ASEH

Description	Radiation and SEE Hardened 3V to 13.2V, 9A Buck Regulator

PDF	36 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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1 / 36 page

FN8746 Rev.4.01

Page 1 of 36

Dec 12, 2019

FN8746

Rev.4.01

Dec 12, 2019

ISL70003ASEH

Radiation and SEE Hardened 3V to 13.2V, 9A Buck Regulator

DATASHEET

The ISL70003ASEH is an improved version of the

ISL70003SEH regulator with both tighter load regulation

(<0.3% typical) and a higher output current rating of 9A.

Operating over an input voltage range of 3.0V to 13.2V with

integrated low rDS(ON) MOSFETs makes this monolithic

solution highly efficient. Also, a tightly regulated output

voltage is possible, which is externally adjustable from 0.6V to

~90% of the input voltage. Continuous output load current

capability is 9A for TJ ≤+125°C and 6A for TJ ≤+150°C.

The ISL70003ASEH uses voltage mode control architecture

with feed-forward and switches at a selectable frequency of

500kHz or 300kHz. Loop compensation is externally

adjustable to allow for an optimum balance between stability

and output dynamic performance.

The device features two logic-level disable inputs that can be

used to inhibit pulses on the phase (LXx) pins to maximize

efficiency based on the load current. The ISL70003ASEH also

supports DDR applications and contains a buffer amplifier for

generating the VREF voltage.

High integration, best-in-class radiation performance and a

feature-filled design make the ISL70003ASEH an ideal choice

to power many of today’s small form-factor applications.

Applications

• FPGA, CPLD, DSP, CPU core, and I/O supply voltages

• DDR memory supply voltages

• Low-voltage, high-density distributed power systems

Related Literature

For a full list of related documents, visit our website:

• ISL70003ASEH device page

Features

• Acceptance tested to 50krad(Si) (LDR) wafer-by-wafer

• ±1% reference voltage over line, temperature, and radiation

• Integrated MOSFETs 31mΩPFET/21mΩ NFET

- 95% peak efficiency

• Externally adjustable loop compensation

• Supports DDR applications (VTT tracks VDDQ/2)

- Buffer amplifier for generating VREF voltage

- 3A current sinking capability

• Grounded lid eliminates charge build up

• IMON pin for output current monitoring

• Adjustable analog soft-start

• Diode emulation for increased efficiency at light loads

• 500kHz or 300kHz operating frequency

• Monotonic start-up into prebiased load

• Full military temperature range operation

-TA = -55°C to +125°C

-TJ = -55°C to +150°C

• Radiation Acceptance (See TID Report)

- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)

- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . . 50krad(Si)

• SEE hardness (See SEE report)

- SEB and SEL LETTH . . . . . . . . . . . . . . . . 86.4MeV•cm2/mg

- SET at LET 86.4MeV•cm2/mg . . . . . . . . . . . .<±3% ΔVOUT

-SEFI LETTH . . . . . . . . . . . . . . . . . . . . . . . . . 60MeV•cm2/mg

• Electrically screened to DLA SMD 5962-14203

FIGURE 1. POWER DISTRIBUTION SOLUTION FOR RAD HARD LOW

POWER FPGAs

FIGURE 2. TYPICAL LOAD REGULATION, VIN = 12V, VOUT = 3.3V,

fSW = 500kHz

ISL70003ASEH

ISL75051ASEH

12V INTERMEDIATE BUS

1.5V CORE

1.8V AUX

3.3V I/O

5V BUS

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

01

23456

789

LOAD CURRENT (A)

-55°C

+125°C

+25°C

+85°C

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