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STM32H7 Datasheet(PDF) 351 Page - STMicroelectronics |
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STM32H7 Datasheet(HTML) 351 Page - STMicroelectronics |
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351 / 357 page ![]() DS12110 Rev 10 351/357 STM32H742xI/G STM32H743xI/G Revision history 356 18-May-2018 4 Updated LSI clock frequency and ADC on cover page. Removed note related to UFBGA169 package. Updated USB OTG interfaces to add crystal-less capability. Updated ADC features on cover page and in Table 2: STM32H742xI/G and STM32H743xI/G features and peripheral counts. Added Arm trademark notice in Section 1: Introduction. Updated Figure 1: STM32H743xI/G block diagram. Updated GPIO default mode in Section 3.8: General-purpose input/outputs (GPIOs). Added ADC sampling rate values in Section 3.17: Analog-to-digital converters (ADCs). Updated Section 3.18: Temperature sensor. Updated LCD-TFT FIFO Size in Section 3.25: LCD-TFT controller. Section 3.33: Serial peripheral interfaces (SPI)/integrated interchip sound interfaces (I2S): changed maximum SPI frequency to 150 Mbits/s. Modified number of bidirectional endpoints in Section 3.40: Universal serial bus on-the- go high-speed (OTG_HS). Table 9: Pin/ball definition: updated PC14 and PC15 function after reset; changed CAN1_TX/RX to FDCAN1_TX/RX and CAN1_TXFD/RXFD to FDCAN1_TXFD_MODE/RXFD_MODE; changed CAN2_TX/RX to FDCAN2_TX/RX and CAN2_TXFD/RXFD to FDCAN2_TXFD_MODE/RXFD_MODE and replaced VCAP1/2/3 and VDDLDO1/2/3 by VCAP and VDDLDO, respectively. Updated PA0, PA13, PA14, PC14 and PC15 pin/ball signals in pinout/ballout schematics. Replaced fACLK by frcc_c_ck in Section : Typical and maximum current consumption. Replaced system clock by CPU clock and fACLK by frcc_c_ck in Section : On-chip peripheral current consumption. Updated Note 2. in Table 27: Reset and power control block characteristics, Table 28: Embedded reference voltage, Table 30: Typical and maximum current consumption in Run mode, code with data processing running from ITCM, regulator ON, Table 31: Typical and maximum current consumption in Run mode, code with data processing running from flash memory, cache ON, regulator ON, Table 36: Typical and maximum current consumption in Stop mode, regulator ON, Table 37: Typical and maximum current consumption in Standby mode and Table 38: Typical and maximum current consumption in VBAT mode. Added note to fLSI in Table 49: LSI oscillator characteristics. Updated Figure 22: VIL/VIH for all I/Os except BOOT0. Added note in Table 84: QUADSPI characteristics in SDR mode, Table 85: QUADSPI characteristics in DDR mode and Table 86: Dynamics characteristics: Delay Block characteristics. Section 6.3.20: 16-bit ADC characteristics: updated THD conditions in Table 88: ADC accuracy; removed formula to compute RAIN. Changed decoupling capacitor value to 100 nF in Section : General PCB design guidelines. Added note in Table 89: DAC characteristics, Table 97: Voltage booster for analog switch characteristics, Table 100: DFSDM measured timing - 1.62-3.6 V, Table 117: Dynamics JTAG characteristics and Table 118: Dynamics SWD characteristics. Updated Figure 128: LQFP144 marking example (package top view), Figure 134: LQFP176 marking example (package top view) and Figure 137: LQFP208 marking example (package top view). Updated TFBGA240+25 package information to final mechanical data. Table 231. Document revision history Date Revision Changes |
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