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STM32H7 Datasheet(PDF) 352 Page - STMicroelectronics |
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STM32H7 Datasheet(HTML) 352 Page - STMicroelectronics |
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352 / 357 page ![]() Revision history STM32H742xI/G STM32H743xI/G 352/357 DS12110 Rev 10 13-Jul-2018 5 Added description of power-up and power-down phases in Section 3.5.1: Power supply scheme. Removed ETH_TX_ER from Table 9: Pin/ball definition and Table 10: Port A alternate functions to Table 20: Port K alternate functions. Added note related to decoupling capacitor tolerance below Figure 15: Power supply scheme. Added note 2. related to CEXT in Table 25: VCAP operating conditions. Updated Table 46: HSI48 oscillator characteristics, Table 47: HSI oscillator characteristics and Table 48: CSI oscillator characteristics. Renamed Table 50 into “PLL characteristics (wide VCO frequency range)” and updated note 2.. Added Table 51: PLL characteristics (medium VCO frequency range). Updated Tcoeff in Table 91: VREFBUF characteristics and tS_vbat in Table 94: VBAT monitoring characteristics. Updated Table 99: OPAMP characteristics. 05-Apr-2019 6 Added STM32H743xG part numbers corresponding to 1 Mbyte of flash memory as well as STM32H742xI/G part numbers. Changed maximum Arm Core-M7 frequency to 480 MHz. Features: – Changed operational amplifier bandwidth to 7.3 MHz – Updated high-resolution timer to 2.1 ns – Updated low-power consumption feature. – Updated Figure 2: STM32H743xI/G block diagram. Updated voltage scaling in Section 3.5.1: Power supply scheme. Added VOS0 in Section 3.5.3: Voltage regulator. Updated HSE clock in Section 3.7.1: Clock management. Changed FMC NOR/NAND maximum clock frequency to 100 MHz in Features and Synchronous waveforms and timings. Added note related to VDDLDO in Table 9: Pin/ball definition. Updated Section 6: Electrical characteristics (rev Y): – Added note 2. related to CEXT in Table 25: VCAP operating conditions. – Updated fHSI48 in Table 46: HSI48 oscillator characteristics. – Updated tstab in Table 47: HSI oscillator characteristics. – Updated Table 60: I/O static characteristics and Figure 22: VIL/VIH for all I/Os except BOOT0. – Added Table 62: Output voltage characteristics for PC13, PC14, PC15 and PI8. – Added note related to PC13, PC14, PC15 an PI8 limited frequency in Table 63: Output timing characteristics (HSLV OFF). – Updated note 2 below Figure 23: Recommended NRST pin protection. – Table 87: ADC characteristics: updated fS and added note related to fS formula; updated tCAL. – Renamed Section 6.3.24 into Temperature and VBAT monitoring and content updated. – Updated fDFSDMCLK in Table 100: DFSDM measured timing - 1.62-3.6 V. Added Section 7: Electrical characteristics (rev V). Updated paragraph introducing all package marking schematics to add the new sentence “The printed markings may differ depending on the supply chain”. Updated Table 230: Thermal characteristics. Added note related to ECOPACK®2 compliance in Section 9: Ordering information. Table 231. Document revision history Date Revision Changes |
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