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PIC18F6410E/PTSQTP Datasheet(PDF) 211 Page - Microchip Technology |
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PIC18F6410E/PTSQTP Datasheet(HTML) 211 Page - Microchip Technology |
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211 / 404 page ![]() 2004 Microchip Technology Inc. Preliminary DS39635A-page 209 PIC18F6310/6410/8310/8410 17.0 ENHANCED UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER (EUSART) PIC18F6310/6410/8310/8410 devices have three serial I/O modules: the MSSP module, discussed in the previous chapter and two Universal Synchronous Asynchronous Receiver Transmitter (USART) mod- ules. (Generically, the USART is also known as a Serial Communications Interface or SCI.) The USART can be configured as a full-duplex asynchronous system that can communicate with peripheral devices, such as CRT terminals and personal computers. It can also be configured as a half-duplex synchronous system that can communicate with peripheral devices, such as A/D or D/A integrated circuits, serial EEPROMs, etc. There are two distinct implementations of the USART module in these devices: the Enhanced USART (EUSART), discussed here and the Addressable USART, discussed in the next chapter. For this device family, USART1 always refers to the EUSART, while USART2 is always the AUSART. The EUSART and AUSART modules implement the same core features for serial communications; their basic operation is essentially the same. The EUSART module provides additional features, including auto- matic baud rate detection and calibration, automatic wake-up on Sync Break reception and 12-bit Break character transmit. These features make it ideally suited for use in Local Interconnect Network bus (LIN bus) systems. The EUSART can be configured in the following modes: • Asynchronous (full-duplex) with: - Auto-wake-up on character reception - Auto-baud calibration - 12-bit Break character transmission • Synchronous – Master (half-duplex) with selectable clock polarity • Synchronous – Slave (half-duplex) with selectable clock polarity The pins of the Enhanced USART are multiplexed with PORTC. In order to configure RC6/TX1/CK1 and RC7/RX1/DT1 as a USART: • bit SPEN (RCSTA1<7>) must be set (= 1) • bit TRISC<7> must be set (= 1) • bit TRISC<6> must be set (= 1) The operation of the Enhanced USART module is controlled through three registers: • Transmit Status and Control Register 1 (TXSTA1) • Receive Status and Control Register 1 (RCSTA1) • Baud Rate Control Register 1 (BAUDCON1) The registers are described in Register 17-1, Register 17-2 and Register 17-3. Note: The USART control will automatically reconfigure the pin from input to output as needed. |
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