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UPD161401W/P Datasheet(PDF) 7 Page - Renesas Technology Corp |
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UPD161401W/P Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 126 page  Data Sheet S15726EJ2V0DS 5 µµµµPD161401 1. BLOCK DIAGRAM D15 to D8 D7(SI) D6(SCL) D5 to D0 RS /DISP TOUT15 to TOUT0 /CS1 CS2 /RD(E) /WR(R,/W) M,/S FR FRSYNC OSCIN1 OSCIN2 OSCOUT OSCSYNC C1 , C1 C5 , C5 + - + - VRS IRS VR AMPOUTM AMPOUTS SEG1 SEG303 O1 O80 VLCD VLC1 VLC2 VLC3 VLC4 VDD1 VDD2 VSS Segment gray-scale control Segment driver Display data latch Display data RAM 101 x 8 x 80 bits Blink & Inverse data RAM 303 bits Data register D/A converter Op amp. I/O buffer Oscillator circuit DC/DC converter LCD voltage generator Common driver Common timing generator DOF VOUT Graphic control Data control Address control Register Command decorder Gray-scale control Logic Control Circuit VOUT2 Timing generator IFM0 IFM1 TSTRTST TSTVIHL TPWR0, TPWR1 Remark /xxx is an active-low signal. |
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