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PSD835G2 Datasheet(PDF) 65 Page - STMicroelectronics |
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PSD835G2 Datasheet(HTML) 65 Page - STMicroelectronics |
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65 / 102 page  65/102 PSD835G2 Table 42. Drive Register Pin Assignment Note: 1. NA = Not Applicable. Port Data Registers The Port Data Registers, shown in Table 43, are used by the MCU to write data to or read data from the ports. Table 43 shows the register name, the ports having each register type, and MCU access for each register type. The registers are described below. Data In Port pins are connected directly to the Data In buff- er. In MCU I/O input mode, the pin input is read through the Data In buffer. Data Out Register Stores output data written by the MCU in the MCU I/O output mode. The contents of the Register are driven out to the pins if the Direction Register or the output enable product term is set to '1.' The contents of the register can also be read back by the MCU. Output Macrocells (OMC) The CPLD Output Macrocells (OMC) occupy a lo- cation in the MCU’s address space. The MCU can read the output of the Output Macrocells (OMC). If the OMC Mask Register bits are not set, writing to the macrocell loads data to the macrocell flip-flops. See PLDs, page 38. OMC Mask Register Each OMC Mask Register bit corresponds to an Output Macrocell (OMC) flip-flop. When the OMC Mask Register bit is set to a '1,' loading data into the Output Macrocell (OMC) flip-flop is blocked. The default value is 0 or unblocked. Table 43. Port Data Registers Drive Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Port A Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Port B Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Port C Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Port D NA1 NA1 NA1 NA1 Open Drain Open Drain Open Drain Open Drain Port E Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Port F Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Slew Rate Port G Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Open Drain Register Name Port MCU Access Data In A, B, C, D, E, F, G READ – input on pin Data Out A, B, C, D, E, F, G WRITE/READ Output Macrocell A, B READ – outputs of macrocells WRITE – loading macrocell flip-flops Mask Macrocell A, B WRITE/READ – prevents loading into a given macrocell Input Macrocell A, B, C READ – outputs of the Input Macrocells Enable Out A, B, C, F READ – the output enable control of the port driver |
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