ADFS7124-8BBCPZ datasheet(76/93 Pages) AD

76 / 93 page

Data Sheet

ADFS7124-8

APPLICATIONS INFORMATION

analog.com

Rev. 0 | 76 of 93

4. Program the excitation currents to 500 µA and output the

currents on the AIN0 and AIN3 pins.

5. Wait until RDY goes low. Read the conversion value.

6. Repeat Step 4.

In the processor, implement the linearization routine for the PT100.

The external antialias filter is omitted for clarity. However, such a fil-

ter is required to reject any interference at the modulator frequency

and multiples of the modulator frequency. Also, some filtering may

be needed for EMI purposes. Both the analog inputs and reference

inputs can be buffered, which allows the user to connect any RC

combination to the reference or analog input pins.

On the ADFS7124-8, the excitation currents can be made available

at the input pins, for example, the AIN3 pin can function as an ana-

log input as well as outputting the current source. This option allows

multiple sensors to be connected to the ADC using a minimum pin

count. However, the resistor of the antialiasing filter is in series with

the RTD. This introduces an error in the conversions as there is a

voltage generated across the antialiasing resistor. To minimize the

error, minimize the resistance of the antialiasing filter.

The power mode to use depends on the performance required from

the system along with the current consumption allowance for the

system. In a field transmitter, low current consumption is essential.

In this application, the low power mode or mid power mode is most

suitable. In process control applications, power consumption is not

a priority. Thus, full power mode may be selected. The full power

mode offers higher throughput and lower noise.

The ADFS7124-8 on-chip diagnostics allow the user to check the

circuit connections, monitor the power supply, reference, and LDO

voltages, check all conversions and calibrations for any errors, as

well as monitor any read/write operations. In RTD applications, the

circuit connections are verified using the reference detect and the

burnout currents. The REF_DET_ERR flag is set if the external

reference REFIN2(±) is missing. The burnout currents (available in

the configuration registers) detect an open wire. The decoupling

capacitors on the LDOs can also be checked. The ADC indicates if

the capacitor is not present.

As part of the conversion process, the analog input overvoltage/un-

dervoltage monitors are useful to detect any excessive voltages

on AINP and AINM. The power supply voltages and reference

voltages are selectable as inputs to the ADC. Thus, the voltages

can be periodically checked to confirm whether they are within

the system specification. Also, it is possible to check that the

LDO voltages are within specification. The conversion process and

calibration process can also be checked. This ensures that any

invalid conversions or calibrations are flagged.

Finally, the CRC check, SCLK counter, and the SPI read/write

checks make the interface more robust as any read/write operation

that is not valid is detected. The CRC check highlights if any bits

are corrupted when being transmitted between the processor and

the ADC.

Figure 127. 3-Wire RTD Application

ADFS7124-8BBCPZ Datasheet(PDF) 76 Page - Analog Devices

ADFS7124-8BBCPZ Datasheet(HTML) 76 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93

Datasheet Download

Link URL