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ATMEGA406_0607 Datasheet(PDF) 55 Page - ATMEL Corporation

Part # ATMEGA406_0607
Description  8-bit Microcontroller with 40K Bytes In-System Programmable Flash
PDF  263 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATMEGA406_0607 Datasheet(HTML) 55 Page - ATMEL Corporation

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55
2548E–AVR–07/06
ATmega406
11.3
Register Description
11.3.1
MCUCR – MCU Control Register
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section ”Boot Loader Support – Read-While-Write
Self-Programming” on page 178 for details. To avoid unintentional changes of Interrupt Vector
tables, a special write procedure must be followed to change the IVSEL bit:
a.
Write the Interrupt Vector Change Enable (IVCE) bit to one.
b.
Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status
Register is unaffected by the automatic disabling.
Note:
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while
executing from the Boot Loader section. Refer to the section ”Boot Loader Support – Read-While-
Write Self-Programming” on page 178 for details on Boot Lock bits.
• Bit 0 – IVCE: Interrupt Vector Change Enable
The IVCE bit must be written to logic one to enable change of the IVSEL bit. IVCE is cleared by
hardware four cycles after it is written or when IVSEL is written. Setting the IVCE bit will disable
interrupts, as explained in the IVSEL description above. See Code Example below.
Bit
76543
210
0x35 (0x55)
JTD
–
–
PUD
–
–
IVSEL
IVCE
MCUCR
Read/Write
R/W
R
R
R/W
R
R
R/W
R/W
Initial Value
00000
000



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