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AT89C51AC3-RDTIM Datasheet(PDF) 23 Page - ATMEL Corporation |
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AT89C51AC3-RDTIM Datasheet(HTML) 23 Page - ATMEL Corporation |
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23 / 143 page ![]() 23 AT89C51AC3 4383B–8051–01/05 Figure 11. External Data Read Waveforms Notes: 1. RD# signal may be stretched using M0 bit in AUXR register. 2. When executing MOVX @Ri instruction, P2 outputs SFR content. Figure 12. External Data Write Waveforms Notes: 1. WR# signal may be stretched using M0 bit in AUXR register. 2. When executing MOVX @Ri instruction, P2 outputs SFR content. ALE P0 P2 RD#1 DPL or Ri D7:0 DPH or P22 P2 CPU Clock ALE P0 P2 WR#1 DPL or Ri D7:0 P2 CPU Clock DPH or P22 |
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