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AM41PDS3228DB10IS Datasheet(PDF) 49 Page - Advanced Micro Devices |
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AM41PDS3228DB10IS Datasheet(HTML) 49 Page - Advanced Micro Devices |
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49 / 59 page ![]() 48 Am41PDS3228D May 13, 2002 P R E L IMINARY FLASH AC CHARACTERISTICS Alternate CE#f Controlled Erase and Program Operations Notes: 1. Not 100% tested. 2. See the “Flash Erase And Programming Performance” section for more information. Parameter Speed Options Unit JEDEC Std Description 10 11 tAVAV tWC Write Cycle Time (Note 1) Min 100 110 ns t AVWL t AS Address Setup Time (WE# to Address) Min 0 ns t ASO Address Setup Time to CE#f Low During Toggle Bit Polling Min 15 ns tELAX tAH Address Hold Time Min 60 ns t AHT Address Hold time from CE#f or OE# High During Toggle Bit Polling Min 0 ns tDVEH tDS Data Setup Time Min 60 ns t EHDX t DH Data Hold Time Min 0 ns t GHEL t GHEL Read Recovery Time Before Write (OE# High to WE# Low) Min 0 ns tWLEL tWS WE# Setup Time Min 0 ns t EHWH t WH WE# Hold Time Min 0 ns tELEH tCP CE#f Pulse Width Min 60 ns t EHEL t CPH CE#f Pulse Width High Min 60 ns tWHWH1 tWHWH1 Programming Operation (Note 2) Typ 16 µs t WHWH1 t WHWH1 Accelerated Programming Operation, Word or Byte (Note 2) Typ 5 µs tWHWH2 tWHWH2 Sector Erase Operation (Note 2) Typ 1 sec |
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