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AM41PDS3228DB10IS Datasheet(PDF) 51 Page - Advanced Micro Devices

Part # AM41PDS3228DB10IS
Description  32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
PDF  59 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM41PDS3228DB10IS Datasheet(HTML) 51 Page - Advanced Micro Devices

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Am41PDS3228D
May 13, 2002
P R E L IMINARY
SRAM AC CHARACTERISTICS
Read Cycle
Note: CE1#s = OE# = V
IL, CE2s = WE# = VIH, UB#s and/or LB#s = VIL
Figure 28.
SRAM Read Cycle—Address Controlled
Parameter
Symbol
Description
10, 11
Unit
tRC
Read Cycle Time
Min
70
ns
t
AA
Address Access Time
Max
70
ns
tCO1, tCO2
Chip Enable to Output
Max
70
ns
t
OE
Output Enable Access Time
Max
35
ns
tBA
LB#s, UB#s to Access Time
Max
70
ns
t
LZ1, tLZ2
Chip Enable (CE1#s Low and CE2s High) to Low-Z Output
Min
10
ns
tBLZ
UB#, LB# Enable to Low-Z Output
Min
10
ns
t
OLZ
Output Enable to Low-Z Output
Min
5
ns
tHZ1, tHZ2
Chip Disable to High-Z Output
Max
25
ns
t
BHZ
UB#s, LB#s Disable to High-Z Output
Max
25
ns
tOHZ
Output Disable to High-Z Output
Max
25
ns
t
OH
Output Data Hold from Address Change
Min
10
ns
Address
Data Out
Previous Data Valid
Data Valid
tAA
tRC
tOH



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