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SMC032BFY6 Datasheet(PDF) 54 Page - STMicroelectronics |
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SMC032BFY6 Datasheet(HTML) 54 Page - STMicroelectronics |
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54 / 91 page ![]() CF-ATA registers SMCxxxBF 54/91 9.11 Card (Drive) Address Register The Card (Drived) Address register is located at address 3F7h [377h], offset Fh. This read-only register is provided for compatibility with the AT disk drive interface and can be used for confirming the drive status. It is recommended that this register is not mapped into the host’s I/O space because of potential conflicts on Bit 7. The bits are defined as follows: 9.11.1 Bit 7 This bit is don’t care. 9.11.2 Bit 6 (–WTG) This bit is ‘0’ when a write operation is in progress, otherwise, it is ‘1’. 9.11.3 Bit 5 (–HS3) This bit is the negation of bit 3 in the Drive/Head register. 9.11.4 Bit 4 (–HS2) This bit is the negation of bit 2 in the Drive/Head register. 9.11.5 Bit 3 (–HS1) This bit is the negation of bit 1 in the Drive/Head register. 9.11.6 Bit 2 (–HS0) This bit is the negation of bit 0 in the Drive/Head register. 9.11.7 Bit 1 (–nDS1) This bit is ‘0’ when drive 1 is active and selected. 9.11.8 Bit 0 (–nDS0) This bit is ‘0’ when the drive 0 is active and selected. Table 47. Card (Drive) Address Register D7 D6 D5 D4 D3 D2 D1 D0 X –WTG –HS3 –HS2 –HS1 –HS0 –nDS1 –nDS0 |
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