SMC032BFY6 datasheet(18/91 Pages) STMICROELECTRONICS

18 / 91 page

Electrical interface

SMCxxxBF

18/91

D15-D00

(PC Card Memory Mode)

I/O

31,30,29,28,

27,49,48,47,

6,5,4,3,2,

23,22,21

Carry the Data, Commands and Status information between

the host and the controller. D00 is the LSB of the Even Byte

of the Word. D08 is the LSB of the Odd Byte of the Word.

D15-D00

(PC Card I/O Mode)

Same as PC Card Memory Mode.

D15-D00

(True IDE Mode)

All Task File operations occur in Byte mode on D00 to D07

while all data transfers are 16 bit using D00 to D15.

GND

(PC Card Memory Mode)

1,50

Ground.

GND

(PC Card I/O Mode)

Same for all modes.

GND

(True IDE Mode)

Same for all modes.

–INPACK

(PC Card Memory Mode)

O43

Not used, should not be connected to the host.

–INPACK

(PC Card I/O Mode)

The Input Acknowledge is asserted when the Card is

selected and responding to an I/O read cycle at the current

address on the bus. It is used by the host to control the

enable of any input data buffers between the Card and

CPU.

DMARQ

(True IDE Mode)

The DMARQ input signal is used to request a DMA data

transfer between the host and the Card. It is asserted to

notify that the Card is ready to transfer data to or from the

host. For Multi-Word DMA transfers, the direction of data

transfer is controlled by -IORD and -IOWR.

DMARQ is used in conjunction with –DMACK to perform

handshaking: the Card waits until –DMACK has been

asserted by the host to de-assert DMARQ, and re-assert it

again if there is still data to be transferred (see

Section 10.10).

DMARQ is not driven when the Card is not selected.

If the host does not support DMA mode, DMARQ should be

left unconnected.

–IORD

(PC Card Memory Mode)

I34

Not used.

–IORD

(PC Card I/O Mode)

I/O Read strobe generated by the host. It gates I/O data

onto the bus.

–IORD

(True IDE Mode)

Same as PC Card I/O Mode.

Table 9.

Signal Description (continued)

Signal Name

Dir.

Description

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